diff options
| author | Rob Herring <r.herring@freescale.com> | 2009-10-19 14:43:19 -0500 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2010-12-17 12:08:52 -0500 |
| commit | b0ca74c554831771c137b87c0de6c2160f799045 (patch) | |
| tree | 5690552665f0b7843e6552e4d5fe7b63cbc78f51 /arch/arm/mach-stmp378x/include | |
| parent | 003289199f3617d976b73de207835d1369c5f229 (diff) | |
ENGR00117389 Port 5.0.0 release to 2.6.31
This is i.MX BSP 5.0.0 release ported to 2.6.31
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alan Tull <r80115@freescale.com>
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
Diffstat (limited to 'arch/arm/mach-stmp378x/include')
17 files changed, 1678 insertions, 16 deletions
diff --git a/arch/arm/mach-stmp378x/include/mach/ddi_bc.h b/arch/arm/mach-stmp378x/include/mach/ddi_bc.h new file mode 100644 index 000000000000..2018d167aeda --- /dev/null +++ b/arch/arm/mach-stmp378x/include/mach/ddi_bc.h @@ -0,0 +1,736 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc.h +//! \brief Header file for the Battery Charger device driver. +//! \date 06/2005 +//! +//! This file contains externally visible declarations for the Battery Charger +//! device driver. +//! +//! \see ddi_bc.c and related files. +//! \todo [PUBS] Add definitions for TBDs in this file. +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _DDI_BC_H +#define _DDI_BC_H + +#include <linux/types.h> + +//////////////////////////////////////////////////////////////////////////////// +// Includes +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// Definitions +//////////////////////////////////////////////////////////////////////////////// +#define DDI_BC_MAX_RESTART_CYCLES 100 + +#define DDI_BC_LIION_CHARGING_VOLTAGE 4200 +#define DDI_BC_ALKALINE_NIMH_CHARGING_VOLTAGE 1750 + +//! \brief Defines battery charger states. +typedef enum _ddi_bc_State { + //! \brief TBD + DDI_BC_STATE_UNINITIALIZED = 0, + //! \brief TBD + DDI_BC_STATE_BROKEN = 1, + //! \brief TBD + DDI_BC_STATE_DISABLED = 2, + //! \brief TBD + DDI_BC_STATE_WAITING_TO_CHARGE = 3, + //! \brief TBD + DDI_BC_STATE_CONDITIONING = 4, + //! \brief TBD + DDI_BC_STATE_CHARGING = 5, + //! \brief TBD + DDI_BC_STATE_TOPPING_OFF = 6, + //! \brief TBD + DDI_BC_STATE_DCDC_MODE_WAITING_TO_CHARGE = 7, + +} ddi_bc_State_t; + +typedef enum _ddi_bc_BrokenReason { + //! \brief TBD + DDI_BC_BROKEN_UNINITIALIZED = 0, + //! \brief TBD + DDI_BC_BROKEN_CHARGING_TIMEOUT = 1, + //! \brief TBD + DDI_BC_BROKEN_FORCED_BY_APPLICATION = 2, + //! \brief TBD + DDI_BC_BROKEN_EXTERNAL_BATTERY_VOLTAGE_DETECTED = 3, + //! \brief TBD + DDI_BC_BROKEN_NO_BATTERY_DETECTED = 4, + +} ddi_bc_BrokenReason_t; + +//! \brief Defines the battery charger configuration. +typedef struct _ddi_bc_Cfg { + //! \brief Units in milliseconds. + //! + //! This field configures the expected period between calls to + //! ddi_bc_StateMachine. If die temperature monitoring is + //! enabled, then the data sheet recommends the period be around + //! 100ms or less. + //! + //! Note that this period defines the minimum time resolution of + //! the battery charger. + + uint32_t u32StateMachinePeriod; + + //! \brief Units in mA/s. + //! + //! This field configures the slope of the current ramp. Any + //! time the battery charger increases its current draw, it will + //! ramp up the current no faster than this rate. + //! + //! Note that the minimum time resolution of the battery charger + //! is the configured period between calls to advance the state + //! machine. Also, the hardware has a minimum current resolution + //! of 10mA. If the given ramp slope cannot be expressed + //! exactly, then the largest expressible smaller slope will be + //! the result. If the actual period between calls to + //! ddi_bc_StateMachine is irregular, the current may ramp faster + //! than indicated. + + uint16_t u16CurrentRampSlope; + + //! \brief Units in millivolts. + //! + //! This field configures the threshold conditioning voltage. If + //! the battery’s voltage is below this value, it will be + //! conditioned until its voltage rises above the maximum + //! conditioning voltage. After that, the battery will be + //! charged normally. + //! + //! Note that the hardware has a minimum resolution of 8mV. If + //! the given voltage cannot be expressed exactly, then the + //! smallest expressible larger value will be used. + + uint16_t u16ConditioningThresholdVoltage; + + //! \brief Units in millivolts. + //! + //! This field configures the maximum conditioning voltage. If + //! the battery charger is conditioning a battery, normal + //! charging begins when the voltage rises above this value. + //! + //! This value should be slightly higher than the threshold + //! conditioning voltage because it is measured while a + //! conditioning current is actually flowing to the battery. + //! With a conditioning current of 0.1C, reasonable values for + //! the threshold and maximum conditioning voltages are 2.9V + //! and 3.0V respectively. + //! + //! Note that the hardware has a minimum resolution of 8mV. If + //! the given voltage cannot be expressed exactly, then the + //! smallest expressible larger value will be used. + + uint16_t u16ConditioningMaxVoltage; + + //! \brief Units in milliamps. + //! + //! This field configures the maximum conditioning current. + //! This is the maximum current that will be offered to a + //! battery while it is being conditioned. A typical value is + //! 0.1C. + //! + //! Note that the hardware has a minimum resolution of 10mA + //! (see the data sheet for details). If the given current + //! cannot be expressed exactly, then the largest expressible + //! smaller value will be used. + + uint16_t u16ConditioningCurrent; + + //! \brief Units in milliseconds. + //! + //! This field configures the conditioning time-out. This is + //! the maximum amount of time that a battery will be + //! conditioned before the battery charger declares it to be + //! broken. + //! + //! Note that the minimum time resolution of the battery + //! charger is the configured period between calls to advance + //! the state machine. If the given time-out cannot be + //! expressed exactly, then the shortest expressible longer + //! value will be used. + + uint32_t u32ConditioningTimeout; + + //! \brief Units in millivolts. + //! + //! This field configures the final charging voltage. At this + //! writing, only two values are permitted: 4100 or 4200. + + uint16_t u16ChargingVoltage; + + //! \brief Units in milliamps. + //! + //! This field configures the maximum current offered to a + //! charging battery. + //! + //! Note that the hardware has a minimum resolution of 10mA + //! (see the data sheet for details). If the given current + //! cannot be expressed exactly, then the largest expressible + //! smaller value will be used. + + uint16_t u16ChargingCurrent; + + //! \brief Units in milliamps. + //! + //! This field configures the current flow below which a + //! charging battery is regarded as fully charged (typical + //! 0.1C). At this point, the battery will be topped off. + //! + //! Note that the hardware has a minimum resolution of 10mA + //! (see the data sheet for details). If the given current + //! cannot be expressed exactly, then the largest expressible + //! smaller value will be used. + + uint16_t u16ChargingThresholdCurrent; + + //! \brief Units in milliamps. + //! + //! When charging while the DCDC converter's are enabled, the charger + //! is suppling current to both the battery and the Vbat input of the + //! DCDC converter. Once the total battery charger current falls + //! below this level, the charger will then stop charging until the + //! the battery voltage reaches the BC_LOW_DCDCMODE_BATTERY_VOLTAGE + //! threshold or until the DCDCs are no longer enabled. + //! + //! Typically, this value should be left at 180 to avoid the risk + //! of topping off the battery too long in DCDC mode and avoid + //! exceeding the BC_CHARGING_TIMEOUT time which would put the charger + //! driver in the broken state and completely disable charging. + //! + //! Note that the hardware has a minimum resolution of 10mA + //! (see the data sheet for details). If the given current + //! cannot be expressed exactly, then the largest expressible + //! smaller value will be used. + uint16_t u16DdcdModeChargingThresholdCurrent; + + //! \brief Units in milliseconds. + //! + //! This field configures the charging time-out. This is the + //! maximum amount of time that a battery will be charged + //! before the battery charger declares it to be broken. + //! + //! Note that the minimum time resolution of the battery + //! charger is the configured period between calls to advance + //! the state machine. If the given time-out cannot be + //! expressed exactly, then the shortest expressible longer + //! value will be used. + + uint32_t u32ChargingTimeout; + + //! \brief Units in milliseconds. + //! + //! This field configures the top-off period. This is the + //! amount of time a battery will be held in the Topping Off + //! state before it is declared fully charged. + //! + //! Note that the minimum time resolution of the battery + //! charger is the configured period between calls to advance + //! the state machine. If the given time-out cannot be + //! expressed exactly, then the shortest expressible longer + //! value will be used. + + uint32_t u32TopOffPeriod; + + //! \brief Units in milliseconds. + //! + //! This field configures the top-off period when the DCDC + //! converters are enabled. To avoid topping off the LiIon + //! battery too long and reducing it's long term capacity, + //! This time should be kept failry short. + //! + //! Note that the minimum time resolution of the battery + //! charger is the configured period between calls to advance + //! the state machine. If the given time-out cannot be + //! expressed exactly, then the shortest expressible longer + //! value will be used. + uint32_t u32DcdcModeTopOffPeriod; + + //! \brief Causes the battery charger to use an externally generated bias current + //! + //! If cleared, this causes the battery charger to use an + //! externally generated bias current, which is expected to be + //! quite precise. Otherwise, the battery charger will + //! generate a lesser-quality bias current internally. + + uint8_t useInternalBias:1; + + //! \brief Indicates that the battery charger is to monitor the die temperature. + //! + //! If set, this field indicates that the battery charger is to + //! monitor the die temperature. See below for fields that + //! configure the details. + + uint8_t monitorDieTemp:1; + + //! \brief Indicates that the battery charger is to monitor the battery temperature. + //! + //! If set, this field indicates that the battery charger is to + //! monitor the battery temperature. See below for fields that + //! configure the details. + + uint8_t monitorBatteryTemp:1; + + //! \brief Units in degrees centigrade. + //! + //! Note that the hardware reports die temperature in ranges of + //! 10 degree resolution minimum (see the data sheet for + //! details). If the battery charger is monitoring the die + //! temperature, and it rises to a range that includes a + //! temperature greater than or equal to this value, the + //! charging current will be clamped to the safe current. + + int8_t u8DieTempHigh; + + //! \brief Units in degrees centigrade. + //! + //! Note that the hardware reports die temperature in ranges of + //! 10 degrees minimum (see the data sheet for details). If the + //! charging current is being clamped because of a high die + //! temperature, and it falls to a range that doesn’t include a + //! temperatures greater than or equal to this value, the + //! charging current clamp will be released. + + int8_t u8DieTempLow; + + //! \brief Units in milliamps. + //! + //! If the battery charger detects a high die temperature, it + //! will clamp the charging current at or below this value. + + uint16_t u16DieTempSafeCurrent; + + //! \brief If the battery charger is monitoring the battery + //! temperature, this field indicates the LRADC channel to + //! read. + + uint8_t u8BatteryTempChannel; + + //! \brief If the battery charger is monitoring the battery + //! temperature, and it rises to a measurement greater than or + //! equal to this value, the charging current will be clamped + //! to the corresponding safe current. + + uint16_t u16BatteryTempHigh; + + //! \brief If the charging current is being clamped because of a high + //! battery temperature, and it falls below this value, the + //! charging current clamp will be released. + + uint16_t u16BatteryTempLow; + + //! \brief Units in milliamps. + //! + //! If the battery charger detects a high battery temperature, + //! it will clamp the charging current at or below this value. + + uint16_t u16BatteryTempSafeCurrent; + + //! \brief Units in millivolts. + //! + //! In the WaitingToCharge state, if we are in DCDC + //! operating modes, if the battery voltage measurement + //! is below this value, we immediately proceed with charging. + //! the low criteria for this value is that it must be high + //! to not risk the battery voltage getting too low. The + //! upper criteria is that you do not want the IR voltage + //! drop under heavy loads to make you start charging too soon + //! because the goal in DCDC operating mode is to not be constantly + //! topping off the battery which can shorten its life + + uint16_t u16LowDcdcBatteryVoltage_mv; + + uint32_t u32StateMachineNonChargingPeriod; +} ddi_bc_Cfg_t; + +//! Status returned by Battery Charger functions. + +typedef enum _ddi_bc_Status { + //! \brief TBD + DDI_BC_STATUS_SUCCESS = 0, + //! \brief TBD + DDI_BC_STATUS_HARDWARE_DISABLED, + //! \brief TBD + DDI_BC_STATUS_BAD_BATTERY_MODE, + //! \brief TBD + DDI_BC_STATUS_CLOCK_GATE_CLOSED, + //! \brief TBD + DDI_BC_STATUS_NOT_INITIALIZED, + //! \brief TBD + DDI_BC_STATUS_ALREADY_INITIALIZED, + //! \brief TBD + DDI_BC_STATUS_BROKEN, + //! \brief TBD + DDI_BC_STATUS_NOT_BROKEN, + //! \brief TBD + DDI_BC_STATUS_NOT_DISABLED, + //! \brief TBD + DDI_BC_STATUS_BAD_ARGUMENT, + //! \brief TBD + DDI_BC_STATUS_CFG_BAD_BATTERY_TEMP_CHANNEL, + //! \brief TBD + DDI_BC_STATUS_CFG_BAD_CHARGING_VOLTAGE, +} ddi_bc_Status_t; + +///////////////////////////////////////////////////////////////////////////////// +// BCM Event Codes +// +// These are the codes that might be published to PMI Subscribers. +///////////////////////////////////////////////////////////////////////////////// + +#define DDI_BC_EVENT_GROUP (11<<10) + +//! \brief TBD +//! \todo [PUBS] Add definition(s)... +typedef enum { + // Use the error code group value to make events unique for the EOI + //! \brief TBD + ddi_bc_MinEventCode = DDI_BC_EVENT_GROUP, + //! \brief TBD + ddi_bc_WaitingToChargeCode, + //! \brief TBD + ddi_bc_State_ConditioningCode, + //! \brief TBD + ddi_bc_State_Topping_OffCode, + //! \brief TBD + ddi_bc_State_BrokenCode, + //! \brief TBD + ddi_bc_SettingChargeCode, + //! \brief TBD + ddi_bc_RaisingDieTempAlarmCode, + //! \brief TBD + ddi_bc_DroppingDieTempAlarmCode, + + //! \brief TBD + ddi_bc_MaxEventCode, + //! \brief TBD + ddi_bc_DcdcModeWaitingToChargeCode +} ddi_bc_Event_t; + +//////////////////////////////////////////////////////////////////////////////// +// Prototypes +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +//! \brief Initialize the Battery Charger. +//! +//! \fntype Function +//! +//! This function initializes the Battery Charger. +//! +//! \param[in] pCfg A pointer to the new configuration. +//! +//! \retval DDI_BC_STATUS_SUCCESS +//! If the operation succeeded. +//! \retval DDI_BC_STATUS_ALREADY_INITIALIZED +//! If the Battery Charger is already initialized. +//! \retval DDI_BC_STATUS_HARDWARE_DISABLED +//! If the Battery Charger hardware is disabled by a laser fuse. +//! \retval DDI_BC_STATUS_BAD_BATTERY_MODE +//! If the power supply is set up for a non-rechargeable battery. +//! \retval DDI_BC_STATUS_CLOCK_GATE_CLOSED +//! If the clock gate for the power supply registers is closed. +//! \retval DDI_BC_STATUS_CFG_BAD_CHARGING_VOLTAGE +//! If the charging voltage is not either 4100 or 4200. +//! \retval DDI_BC_STATUS_CFG_BAD_BATTERY_TEMP_CHANNEL +//! If the LRADC channel number for monitoring battery temperature +//! is bad. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_init.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_Init(ddi_bc_Cfg_t * pCfg); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the Battery Charger configuration. +//! +//! \fntype Function +//! +//! This function reports the Battery Charger configuration. +//! +//! Note that, if the Battery Charger has not yet been initialized, the data +//! returned by this function is unknown. +//! +//! \param[in,out] pCfg A pointer to a structure that will receive the data. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern void ddi_bc_QueryCfg(ddi_bc_Cfg_t * pCfg); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Shut down the Battery Charger. +//! +//! \fntype Function +//! +//! This function immediately shuts down the Battery Charger hardware and +//! returns the state machine to the Uninitialized state. Use this function to +//! safely “mummify” the battery charger before retiring it from memory. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern void ddi_bc_ShutDown(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Advances the state machine. +//! +//! \fntype Function +//! +//! This function advances the state machine. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! \retval DDI_BC_STATUS_BROKEN If the battery violated a time-out +//! and has been declared broken. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_StateMachine(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Get the Battery Charger's current state. +//! +//! \fntype Function +//! +//! This function returns the current state. +//! +//! \retval The current state. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_State_t ddi_bc_GetState(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Disable the Battery Charger. +//! +//! \fntype Function +//! +//! This function forces the Battery Charger into the Disabled state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetDisable(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Enable the Battery Charger. +//! +//! \fntype Function +//! +//! If the Battery Charger is in the Disabled state, this function moves it to +//! the Waiting to Charge state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! \retval DDI_BC_STATUS_NOT_DISABLED If the Battery Charger is not +//! disabled. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetEnable(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Declare the battery to be broken. +//! +//! \fntype Function +//! +//! This function forces the Battery Charger into the Broken state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetBroken(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Declare the battery to be fixed. +//! +//! \fntype Function +//! +//! If the Battery Charger is in the Broken state, this function moves it to +//! the Disabled state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! \retval DDI_BC_STATUS_NOT_BROKEN If the Battery Charger is not broken. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetFixed(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the current limit. +//! +//! \fntype Function +//! +//! This function applies a limit to the current that the Battery Charger can +//! draw. +//! +//! \param[in] u16Limit The maximum current the Battery Charger can draw +//! (in mA). +//! +//! \retval The expressible version of the limit. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern uint16_t ddi_bc_SetCurrentLimit(uint16_t u16Limit); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the current limit. +//! +//! \fntype Function +//! +//! This function reports the limit to the current that the Battery Charger can +//! draw. +//! +//! \retval The current limit. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern uint16_t ddi_bc_GetCurrentLimit(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the current threshold. +//! +//! \fntype Function +//! +//! +//! \param[in] u16Current Current threshold where charger deactivates (in mA). +//! +//! +//////////////////////////////////////////////////////////////////////////////// +extern uint16_t ddi_bc_SetCurrentThreshold(uint16_t u16Current); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the battery charger state machine period. +//! +//! \fntype Function +//! +//! This function sets a new state machine period. The Period and Slope should +//! be coordinated to achieve the minimal ramp step current which will minimize +//! transients on the system. +//! +//! \param[in] u32StateMachinePeriod (in milliseconds) +//! \param[in] u16CurrentRampSlope (in mA/s) +//! +//! \retval SUCCESS If all goes well +//! \retval ERROR_DDI_BCM_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetNewPeriodAndSlope(uint32_t + u32StateMachinePeriod, + uint16_t + u16CurrentRampSlope); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the state machine period. +//! +//! \fntype Function +//! +//! This function reports the battery charger period. +//! +//! \retval The battery charger period (in milliseconds). +//! +//////////////////////////////////////////////////////////////////////////////// +extern uint32_t ddi_bc_GetStateMachinePeriod(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the current ramp slope. +//! +//! \fntype Function +//! +//! This function reports the current ramp slope. +//! +//! \retval The current ramp slope (in mA/s). +//! +//////////////////////////////////////////////////////////////////////////////// +extern uint32_t ddi_bc_GetCurrentRampSlope(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the time spent in the present state (milliseconds) +//! +//! \fntype Function +//! +//! This function reports the time spent in the present charging state. Note that +//! for the states that actually charge the battery, this time does not include the +//! time spent under alarm conditions such as die termperature alarm or battery +//! temperature alarm. +//! +//! \retval The time spent in the current state in milliseconds. +//! +//////////////////////////////////////////////////////////////////////////////// +uint32_t ddi_bc_GetStateTime(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the reason for being in the broken state +//! +//! \fntype Function +//! +//! +//! \retval ddi_bc_BrokenReason_t enumeration +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_BrokenReason_t ddi_bc_GetBrokenReason(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Restart the charge cycle +//! +//! \fntype Function +//! +//! \retval SUCCESS +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_ForceChargingToStart(void); + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +#endif // _DDI_BC_H +//! @} diff --git a/arch/arm/mach-stmp378x/include/mach/i2c.h b/arch/arm/mach-stmp378x/include/mach/i2c.h new file mode 100644 index 000000000000..05a57f6351e3 --- /dev/null +++ b/arch/arm/mach-stmp378x/include/mach/i2c.h @@ -0,0 +1,48 @@ +/* + * Freescale STMP378X I2C low-level/dma functions + * + * Author: Dmitrij Frasenyak <sed@embeddedalley.com> + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef _ARM_ARCH_I2C_H +#define _ARM_ARCH_I2C_H + +#include <linux/device.h> +#include <linux/module.h> + +#include <linux/completion.h> +#include <linux/i2c.h> + +#define I2C_READ 1 +#define I2C_WRITE 0 + +void hw_i2c_clear_dma_interrupt(void); +int hw_i2c_init(struct device *dev); +void hw_i2c_stop(struct device *dev); +void hw_i2c_setup_write(u8 addr, void *buff, int len, int flags); +void hw_i2c_setup_read(u8 addr, void *buff, int len, int flags); +void hw_i2c_run(int dir); +void hw_i2c_reset_dma(void); +void hw_i2c_finish_read(void *buff, int len); + +struct stmp378x_i2c_dev { + struct device *dev; + int irq_dma; + int irq_err; + struct completion cmd_complete; + u32 cmd_err; + struct i2c_adapter adapter; +}; + +#endif diff --git a/arch/arm/mach-stmp378x/include/mach/lcdif.h b/arch/arm/mach-stmp378x/include/mach/lcdif.h new file mode 100644 index 000000000000..ef5647a7a618 --- /dev/null +++ b/arch/arm/mach-stmp378x/include/mach/lcdif.h @@ -0,0 +1,497 @@ +/* + * Freescale STMP378X LCDIF interfaces + * + * Author: Vitaly Wool <vital@embeddedalley.com> + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef _ARCH_ARM_LCDIF_H +#define _ARCH_ARM_LCDIF_H + +#include <linux/types.h> +#include <linux/fb.h> +#include <linux/list.h> +#include <linux/backlight.h> +#include <linux/dma-mapping.h> +#include <linux/regulator/consumer.h> +#include <mach/dma.h> +#include <mach/platform.h> + +#include "regs-lcdif.h" +#include "regs-apbh.h" + +enum { + SPI_MOSI = 0, + SPI_SCLK, + SPI_CS, +}; + +struct stmp3xxx_lcd_dma_chain_info { + dma_addr_t *dma_addr_p; + unsigned offset; +}; + +enum { + STMP3XXX_LCD_PANEL_SYSTEM = 0, + STMP3XXX_LCD_PANEL_VSYNC, + STMP3XXX_LCD_PANEL_DOTCLK, + STMP3XXX_LCD_PANEL_DVI, +}; + +struct stmp3xxx_platform_bl_data; +struct stmp3xxx_platform_fb_entry { + char name[16]; + u16 x_res; + u16 y_res; + u16 bpp; + u32 cycle_time_ns; + int lcd_type; + int (*init_panel) (struct device * dev, dma_addr_t phys, int memsize, + struct stmp3xxx_platform_fb_entry * pentry); + void (*release_panel) (struct device * dev, + struct stmp3xxx_platform_fb_entry * pentry); + int (*blank_panel) (int blank); + void (*run_panel) (void); + void (*stop_panel) (void); + int (*pan_display) (dma_addr_t phys); + int (*update_panel) (void *p, + struct stmp3xxx_platform_fb_entry * pentry); + struct list_head link; + struct stmp3xxx_platform_bl_data *bl_data; +}; + +struct stmp3xxx_platform_fb_data { + struct list_head list; + struct stmp3xxx_platform_fb_entry *cur; +}; + +#define STMP3XXX_LCDIF_PANEL_INIT 1 +#define STMP3XXX_LCDIF_PANEL_RELEASE 2 + +struct stmp3xxx_platform_bl_data { + struct list_head list; + struct regulator *regulator; + int bl_gpio; + int bl_max_intensity; + int bl_cons_intensity; + int bl_default_intensity; + int (*init_bl) (struct stmp3xxx_platform_bl_data * data); + int (*set_bl_intensity) (struct stmp3xxx_platform_bl_data * data, + struct backlight_device * bd, int suspended); + void (*free_bl) (struct stmp3xxx_platform_bl_data * data); +}; + +static inline void stmp3xxx_lcd_register_entry(struct stmp3xxx_platform_fb_entry + *pentry, + struct stmp3xxx_platform_fb_data + *pdata) +{ + list_add_tail(&pentry->link, &pdata->list); + if (!pdata->cur) + pdata->cur = pentry; +} + +static inline void stmp3xxx_lcd_move_pentry_up(struct stmp3xxx_platform_fb_entry + *pentry, + struct stmp3xxx_platform_fb_data + *pdata) +{ + list_del(&pentry->link); + list_add(&pentry->link, &pdata->list); +} + +static inline int stmp3xxx_lcd_iterate_pdata(struct stmp3xxx_platform_fb_data + *pdata, + int (*func) (struct + stmp3xxx_platform_fb_entry + * pentry, void *data, + int ret_prev), + void *data) +{ + struct stmp3xxx_platform_fb_entry *pentry; + int ret = 0; + list_for_each_entry(pentry, &pdata->list, link) { + ret = func(pentry, data, ret); + } + return ret; +} + +static inline void stmp3xxx_lcd_set_bl_pdata(struct stmp3xxx_platform_bl_data + *pdata) +{ + extern struct platform_device stmp3xxx_backlight; + stmp3xxx_backlight.dev.platform_data = pdata; +} + +void stmp3xxx_init_lcdif(void); +int stmp3xxx_lcdif_dma_init(struct device *dev, dma_addr_t phys, int memsize, + int lcd_master); +void stmp3xxx_lcdif_dma_release(void); +void stmp3xxx_lcdif_run(void); +void stmp3xxx_lcdif_stop(void); +int stmp3xxx_lcdif_pan_display(dma_addr_t addr); + +int stmp3xxx_lcdif_register_client(struct notifier_block *nb); +void stmp3xxx_lcdif_unregister_client(struct notifier_block *nb); +void stmp3xxx_lcdif_notify_clients(unsigned long event, + struct stmp3xxx_platform_fb_entry *pentry); + +#ifndef FBIO_WAITFORVSYNC +#define FBIO_WAITFORVSYNC _IOW('F', 0x20, u_int32_t) +#endif + +#define LCD_DMA_CHANNEL 0 + +static inline void setup_dotclk_panel(u16 v_pulse_width, + u16 v_period, + u16 v_wait_cnt, + u16 v_active, + u16 h_pulse_width, + u16 h_period, + u16 h_wait_cnt, + u16 h_active, int enable_present) +{ + u32 val; + + stmp3xxx_clearl(BM_LCDIF_CTRL_DATA_SHIFT_DIR, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + stmp3xxx_clearl(BM_LCDIF_CTRL_SHIFT_NUM_BITS, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + stmp3xxx_clearl(BM_LCDIF_CTRL1_BYTE_PACKING_FORMAT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + stmp3xxx_setl(BF(7, LCDIF_CTRL1_BYTE_PACKING_FORMAT) | + BM_LCDIF_CTRL1_RECOVER_ON_UNDERFLOW, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT); + val &= ~(BM_LCDIF_TRANSFER_COUNT_V_COUNT | + BM_LCDIF_TRANSFER_COUNT_H_COUNT); + val |= BF(h_active, LCDIF_TRANSFER_COUNT_H_COUNT) | + BF(v_active, LCDIF_TRANSFER_COUNT_V_COUNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT); + + stmp3xxx_clearl(BM_LCDIF_CTRL_VSYNC_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_clearl(BM_LCDIF_CTRL_WAIT_FOR_VSYNC_EDGE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_clearl(BM_LCDIF_CTRL_DVI_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_setl(BM_LCDIF_CTRL_DOTCLK_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_setl(BM_LCDIF_CTRL_BYPASS_COUNT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + stmp3xxx_clearl(BM_LCDIF_CTRL_WORD_LENGTH | + BM_LCDIF_CTRL_INPUT_DATA_SWIZZLE | + BM_LCDIF_CTRL_LCD_DATABUS_WIDTH, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_setl(BF(3, LCDIF_CTRL_WORD_LENGTH) | /* 24 bit */ + BM_LCDIF_CTRL_DATA_SELECT | /* data mode */ + BF(0, LCDIF_CTRL_INPUT_DATA_SWIZZLE) | /* no swap */ + BF(3, LCDIF_CTRL_LCD_DATABUS_WIDTH), /* 24 bit */ + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + val &= ~(BM_LCDIF_VDCTRL0_VSYNC_POL | + BM_LCDIF_VDCTRL0_HSYNC_POL | + BM_LCDIF_VDCTRL0_ENABLE_POL | + BM_LCDIF_VDCTRL0_DOTCLK_POL); + val |= BM_LCDIF_VDCTRL0_ENABLE_POL | + BM_LCDIF_VDCTRL0_DOTCLK_POL; + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + val &= ~(BM_LCDIF_VDCTRL0_VSYNC_OEB); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); /* vsync is output */ + + /* + * need enable sig for true RGB i/f. Or, if not true RGB, leave it + * zero. + */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + val |= BM_LCDIF_VDCTRL0_ENABLE_PRESENT; + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + + /* + * For DOTCLK mode, count VSYNC_PERIOD in terms of complete hz lines + */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + val &= ~(BM_LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT | + BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT); + val |= BM_LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT | + BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT; + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + + stmp3xxx_clearl(BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH, + REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + stmp3xxx_setl(v_pulse_width, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + + stmp3xxx_clearl(BM_LCDIF_VDCTRL1_VSYNC_PERIOD, + REGS_LCDIF_BASE + HW_LCDIF_VDCTRL1); + stmp3xxx_setl(v_period, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL1); + + stmp3xxx_clearl(BM_LCDIF_VDCTRL2_HSYNC_PERIOD | + BM_LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH, + REGS_LCDIF_BASE + HW_LCDIF_VDCTRL2); + + stmp3xxx_setl(BF(h_pulse_width, LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH) | + BF(h_period, LCDIF_VDCTRL2_HSYNC_PERIOD), + REGS_LCDIF_BASE + HW_LCDIF_VDCTRL2); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4); + val &= ~BM_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT; + val |= BF(h_active, LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3); + val &= ~(BM_LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT | + BM_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT); + val |= BF(h_wait_cnt, LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT) | + BF(v_wait_cnt, LCDIF_VDCTRL3_VERTICAL_WAIT_CNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4); + val |= BM_LCDIF_VDCTRL4_SYNC_SIGNALS_ON; + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4); +} + +static inline void release_dotclk_panel(void) +{ + stmp3xxx_clearl(BM_LCDIF_CTRL_DOTCLK_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + __raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + __raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL1); + __raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL2); + __raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3); +} + +static inline void dotclk_dma_chain_init(int memsize, dma_addr_t video_phys, + struct stmp3xxx_dma_descriptor + *video_dma_descriptor, + struct stmp3xxx_lcd_dma_chain_info + *dma_chain_info, + unsigned *dma_chain_info_pos) +{ + unsigned i, bytes_left; + dma_addr_t phys = video_phys; + bytes_left = memsize; + + for (i = 0; bytes_left > 0; ++i) { + unsigned this_chain = bytes_left < 0xff00 ? bytes_left : 0xff00; + /* Count of 0 in the DMA word means 65536 */ + unsigned xfer_count = this_chain & 65535; + stmp3xxx_dma_allocate_command(STMP3XXX_DMA + (LCD_DMA_CHANNEL, + STMP3XXX_BUS_APBH), + &video_dma_descriptor[i]); + if (i != 0) { + /* Chain previous command to this one */ + video_dma_descriptor[i - 1].command->next = + video_dma_descriptor[i].handle; + /* Enable DMA chaining, disable IRQ and semaphore + * on previous command + */ + video_dma_descriptor[i - 1].command->cmd &= + ~(BM_APBH_CHn_CMD_IRQONCMPLT | + BM_APBH_CHn_CMD_SEMAPHORE); + } + video_dma_descriptor[i].command->cmd = + BF(xfer_count, APBH_CHn_CMD_XFER_COUNT) | + BF(1, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_CHAIN | + BF(2, APBH_CHn_CMD_COMMAND); /* DMA read */ + video_dma_descriptor[i].command->pio_words[0] = + BM_LCDIF_CTRL_RUN | + BF(1, LCDIF_CTRL_INPUT_DATA_SWIZZLE) | + BM_LCDIF_CTRL_DATA_SHIFT_DIR | + BM_LCDIF_CTRL_DOTCLK_MODE | + BM_LCDIF_CTRL_BYPASS_COUNT | BM_LCDIF_CTRL_DATA_SELECT; + video_dma_descriptor[i].command->buf_ptr = phys; + dma_chain_info[*dma_chain_info_pos].dma_addr_p = + &video_dma_descriptor[i].command->buf_ptr; + dma_chain_info[*dma_chain_info_pos].offset = phys - video_phys; + ++*dma_chain_info_pos; + phys += this_chain; + bytes_left -= this_chain; + } + video_dma_descriptor[i - 1].command->next = + video_dma_descriptor[0].handle; + pr_debug("%s: Used %u DMA chains to cover %u bytes\n", __func__, i, + memsize); +} + +static inline void setup_dvi_panel(u16 h_active, u16 v_active, + u16 h_blanking, u16 v_lines, + u16 v1_blank_start, u16 v1_blank_end, + u16 v2_blank_start, u16 v2_blank_end, + u16 f1_start, u16 f1_end, + u16 f2_start, u16 f2_end) +{ + u32 val; + /* 32bit packed format (RGB) */ + stmp3xxx_clearl(BM_LCDIF_CTRL1_BYTE_PACKING_FORMAT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + stmp3xxx_setl(BF(0x7, LCDIF_CTRL1_BYTE_PACKING_FORMAT) | + BM_LCDIF_CTRL1_RECOVER_ON_UNDERFLOW, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT); + val &= ~(BM_LCDIF_TRANSFER_COUNT_V_COUNT | + BM_LCDIF_TRANSFER_COUNT_H_COUNT); + val |= BF(h_active, LCDIF_TRANSFER_COUNT_H_COUNT) | + BF(v_active, LCDIF_TRANSFER_COUNT_V_COUNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT); + + /* set lcdif to DVI mode */ + stmp3xxx_setl(BM_LCDIF_CTRL_DVI_MODE, REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_clearl(BM_LCDIF_CTRL_VSYNC_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_clearl(BM_LCDIF_CTRL_DOTCLK_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + stmp3xxx_setl(BM_LCDIF_CTRL_BYPASS_COUNT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + /* convert input RGB -> YCbCr */ + stmp3xxx_setl(BM_LCDIF_CTRL_RGB_TO_YCBCR422_CSC, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + /* interlace odd and even fields */ + stmp3xxx_setl(BM_LCDIF_CTRL1_INTERLACE_FIELDS, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + + stmp3xxx_clearl(BM_LCDIF_CTRL_WORD_LENGTH | + BM_LCDIF_CTRL_INPUT_DATA_SWIZZLE | + BM_LCDIF_CTRL_LCD_DATABUS_WIDTH, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_setl(BF(3, LCDIF_CTRL_WORD_LENGTH) | /* 24 bit */ + BM_LCDIF_CTRL_DATA_SELECT | /* data mode */ + BF(0, LCDIF_CTRL_INPUT_DATA_SWIZZLE) | /* no swap */ + BF(1, LCDIF_CTRL_LCD_DATABUS_WIDTH), /* 8 bit */ + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + /* LCDIF_DVI */ + /* set frame size */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL0); + val &= ~(BM_LCDIF_DVICTRL0_H_ACTIVE_CNT | + BM_LCDIF_DVICTRL0_H_BLANKING_CNT | + BM_LCDIF_DVICTRL0_V_LINES_CNT); + val |= BF(1440, LCDIF_DVICTRL0_H_ACTIVE_CNT) | + BF(h_blanking, LCDIF_DVICTRL0_H_BLANKING_CNT) | + BF(v_lines, LCDIF_DVICTRL0_V_LINES_CNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL0); + + /* set start/end of field-1 and start of field-2 */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL1); + val &= ~(BM_LCDIF_DVICTRL1_F1_START_LINE | + BM_LCDIF_DVICTRL1_F1_END_LINE | + BM_LCDIF_DVICTRL1_F2_START_LINE); + val |= BF(f1_start, LCDIF_DVICTRL1_F1_START_LINE) | + BF(f1_end, LCDIF_DVICTRL1_F1_END_LINE) | + BF(f2_start, LCDIF_DVICTRL1_F2_START_LINE); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL1); + + /* set first vertical blanking interval and end of filed-2 */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL2); + val &= ~(BM_LCDIF_DVICTRL2_F2_END_LINE | + BM_LCDIF_DVICTRL2_V1_BLANK_START_LINE | + BM_LCDIF_DVICTRL2_V1_BLANK_END_LINE); + val |= BF(f2_end, LCDIF_DVICTRL2_F2_END_LINE) | + BF(v1_blank_start, LCDIF_DVICTRL2_V1_BLANK_START_LINE) | + BF(v1_blank_end, LCDIF_DVICTRL2_V1_BLANK_END_LINE); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL2); + + /* set second vertical blanking interval */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL3); + val &= ~(BM_LCDIF_DVICTRL3_V2_BLANK_START_LINE | + BM_LCDIF_DVICTRL3_V2_BLANK_END_LINE); + val |= BF(v2_blank_start, LCDIF_DVICTRL3_V2_BLANK_START_LINE) | + BF(v2_blank_end, LCDIF_DVICTRL3_V2_BLANK_END_LINE); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL3); + + /* fill the rest area black color if the input frame + * is not 720 pixels/line + */ + if (h_active != 720) { + /* the input frame can't be less then (720-256) pixels/line */ + if (720 - h_active > 0xff) + h_active = 720 - 0xff; + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL4); + val &= ~(BM_LCDIF_DVICTRL4_H_FILL_CNT | + BM_LCDIF_DVICTRL4_Y_FILL_VALUE | + BM_LCDIF_DVICTRL4_CB_FILL_VALUE | + BM_LCDIF_DVICTRL4_CR_FILL_VALUE); + val |= BF(720 - h_active, LCDIF_DVICTRL4_H_FILL_CNT) | + BF(16, LCDIF_DVICTRL4_Y_FILL_VALUE) | + BF(128, LCDIF_DVICTRL4_CB_FILL_VALUE) | + BF(128, LCDIF_DVICTRL4_CR_FILL_VALUE); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL4); + } + + /* Color Space Conversion RGB->YCbCr */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF0); + val &= ~(BM_LCDIF_CSC_COEFF0_C0 | + BM_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER); + val |= BF(0x41, LCDIF_CSC_COEFF0_C0) | + BF(3, LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF0); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF1); + val &= ~(BM_LCDIF_CSC_COEFF1_C1 | BM_LCDIF_CSC_COEFF1_C2); + val |= BF(0x81, LCDIF_CSC_COEFF1_C1) | + BF(0x19, LCDIF_CSC_COEFF1_C2); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF1); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF2); + val &= ~(BM_LCDIF_CSC_COEFF2_C3 | BM_LCDIF_CSC_COEFF2_C4); + val |= BF(0x3DB, LCDIF_CSC_COEFF2_C3) | + BF(0x3B6, LCDIF_CSC_COEFF2_C4); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF2); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF3); + val &= ~(BM_LCDIF_CSC_COEFF3_C5 | BM_LCDIF_CSC_COEFF3_C6); + val |= BF(0x70, LCDIF_CSC_COEFF3_C5) | + BF(0x70, LCDIF_CSC_COEFF3_C6); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF3); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF4); + val &= ~(BM_LCDIF_CSC_COEFF4_C7 | BM_LCDIF_CSC_COEFF4_C8); + val |= BF(0x3A2, LCDIF_CSC_COEFF4_C7) | BF(0x3EE, LCDIF_CSC_COEFF4_C8); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF4); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_OFFSET); + val &= ~(BM_LCDIF_CSC_OFFSET_CBCR_OFFSET | BM_LCDIF_CSC_OFFSET_Y_OFFSET); + val |= BF(0x80, LCDIF_CSC_OFFSET_CBCR_OFFSET) | + BF(0x10, LCDIF_CSC_OFFSET_Y_OFFSET); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_OFFSET); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_LIMIT); + val &= ~(BM_LCDIF_CSC_LIMIT_CBCR_MIN | + BM_LCDIF_CSC_LIMIT_CBCR_MAX | + BM_LCDIF_CSC_LIMIT_Y_MIN | + BM_LCDIF_CSC_LIMIT_Y_MAX); + val |= BF(16, LCDIF_CSC_LIMIT_CBCR_MIN) | + BF(240, LCDIF_CSC_LIMIT_CBCR_MAX) | + BF(16, LCDIF_CSC_LIMIT_Y_MIN) | + BF(235, LCDIF_CSC_LIMIT_Y_MAX); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_LIMIT); +} + +static inline void release_dvi_panel(void) +{ + stmp3xxx_clearl(BM_LCDIF_CTRL_DVI_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); +} + +#endif /* _ARCH_ARM_LCDIF_H */ diff --git a/arch/arm/mach-stmp378x/include/mach/pins.h b/arch/arm/mach-stmp378x/include/mach/pins.h index 93f952d35969..f36296a9a2c0 100644 --- a/arch/arm/mach-stmp378x/include/mach/pins.h +++ b/arch/arm/mach-stmp378x/include/mach/pins.h @@ -19,6 +19,32 @@ #define __ASM_ARCH_PINS_H /* + * The number of pin banks and pins per a bank on STMP378x + */ +#define STMP3XXX_PINMUX_NR_BANKS 4 +#define STMP3XXX_PINMUX_BANK_SIZE 32 + +/* + * Macro to convert a pin bank/number pair to a raw pin number + * STMP3XXX_PINMUX_BANK_SIZE and STMP3XXX_PINMUX_NR_BANKS should be + * defined before including this header. + */ +#define STMP3XXX_PINID(bank, pin) (bank * STMP3XXX_PINMUX_BANK_SIZE + pin) +#define STMP3XXX_PINID_TO_BANK(pinid) (pinid / STMP3XXX_PINMUX_BANK_SIZE) +#define STMP3XXX_PINID_TO_PINNUM(pinid) (pinid % STMP3XXX_PINMUX_BANK_SIZE) + +/* + * Special invalid pin identificator to show a pin doesn't exist + */ +#define PINID_NO_PIN STMP3XXX_PINID(STMP3XXX_PINMUX_NR_BANKS, 0) + +static inline int stmp3xxx_valid_pin(unsigned pin) +{ + return STMP3XXX_PINID_TO_BANK(pin) < STMP3XXX_PINMUX_NR_BANKS && + STMP3XXX_PINID_TO_PINNUM(pin) < STMP3XXX_PINMUX_BANK_SIZE; +} + +/* * Define all STMP378x pins, a pin name corresponds to a STMP378x hardware * interface this pin belongs to. */ diff --git a/arch/arm/mach-stmp378x/include/mach/regs-apbh.h b/arch/arm/mach-stmp378x/include/mach/regs-apbh.h index dbcf85b6ac2a..af6371168a4b 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-apbh.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-apbh.h @@ -56,7 +56,7 @@ #define HW_APBH_CH14_NXTCMDAR (0x50 + 14 * 0x70) #define HW_APBH_CH15_NXTCMDAR (0x50 + 15 * 0x70) -#define HW_APBH_CHn_NXTCMDAR 0x50 +#define HW_APBH_CHn_NXTCMDAR(n) (0x50 + n * 0x70) #define BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER 0 #define BV_APBH_CHn_CMD_COMMAND__DMA_WRITE 1 @@ -92,10 +92,24 @@ #define HW_APBH_CH14_SEMA (0x80 + 14 * 0x70) #define HW_APBH_CH15_SEMA (0x80 + 15 * 0x70) -#define HW_APBH_CHn_SEMA 0x80 +#define HW_APBH_CHn_SEMA(n) (0x80 + n * 0x70) #define BM_APBH_CHn_SEMA_INCREMENT_SEMA 0x000000FF #define BP_APBH_CHn_SEMA_INCREMENT_SEMA 0 #define BM_APBH_CHn_SEMA_PHORE 0x00FF0000 #define BP_APBH_CHn_SEMA_PHORE 16 +#define BV_SSP_CTRL0_BUS_WIDTH__ONE_BIT 0x0 +#define BV_SSP_CTRL0_BUS_WIDTH__FOUR_BIT 0x1 +#define BV_SSP_CTRL0_BUS_WIDTH__EIGHT_BIT 0x2 + +#define BV_SSP_CTRL1_WORD_LENGTH__FOUR_BITS 0x3 +#define BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS 0x7 +#define BV_SSP_CTRL1_WORD_LENGTH__SIXTEEN_BITS 0xF + +#define BV_SSP_CTRL1_SSP_MODE__SPI 0x0 +#define BV_SSP_CTRL1_SSP_MODE__SSI 0x1 +#define BV_SSP_CTRL1_SSP_MODE__SD_MMC 0x3 +#define BV_SSP_CTRL1_SSP_MODE__MS 0x4 +#define BV_SSP_CTRL1_SSP_MODE__CE_ATA 0x7 + #endif diff --git a/arch/arm/mach-stmp378x/include/mach/regs-apbx.h b/arch/arm/mach-stmp378x/include/mach/regs-apbx.h index 3b934a4d27f0..06d5f8374e00 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-apbx.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-apbx.h @@ -56,7 +56,7 @@ #define HW_APBX_CH14_NXTCMDAR (0x110 + 14 * 0x70) #define HW_APBX_CH15_NXTCMDAR (0x110 + 15 * 0x70) -#define HW_APBX_CHn_NXTCMDAR 0x110 +#define HW_APBX_CHn_NXTCMDAR(n) (0x110 + n * 0x70) #define BM_APBX_CHn_CMD_COMMAND 0x00000003 #define BP_APBX_CHn_CMD_COMMAND 0 #define BV_APBX_CHn_CMD_COMMAND__NO_DMA_XFER 0 @@ -90,7 +90,7 @@ #define HW_APBX_CH14_BAR (0x130 + 14 * 0x70) #define HW_APBX_CH15_BAR (0x130 + 15 * 0x70) -#define HW_APBX_CHn_BAR 0x130 +#define HW_APBX_CHn_BAR(n) (0x130 + n * 0x70) #define HW_APBX_CH0_SEMA (0x140 + 0 * 0x70) #define HW_APBX_CH1_SEMA (0x140 + 1 * 0x70) @@ -109,7 +109,7 @@ #define HW_APBX_CH14_SEMA (0x140 + 14 * 0x70) #define HW_APBX_CH15_SEMA (0x140 + 15 * 0x70) -#define HW_APBX_CHn_SEMA 0x140 +#define HW_APBX_CHn_SEMA(n) (0x140 + n * 0x70) #define BM_APBX_CHn_SEMA_INCREMENT_SEMA 0x000000FF #define BP_APBX_CHn_SEMA_INCREMENT_SEMA 0 #define BM_APBX_CHn_SEMA_PHORE 0x00FF0000 diff --git a/arch/arm/mach-stmp378x/include/mach/regs-audioin.h b/arch/arm/mach-stmp378x/include/mach/regs-audioin.h index 641ac6126f83..a62a6f33f4ed 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-audioin.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-audioin.h @@ -55,9 +55,19 @@ #define BP_AUDIOIN_ADCVOL_SELECT_LEFT 12 #define BM_AUDIOIN_ADCVOL_MUTE 0x01000000 +#define BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT 16 +#define BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT 0x00FF0000 +#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT 0x00001000 +#define BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0 +#define BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0x000000FF + #define HW_AUDIOIN_MICLINE 0x60 #define HW_AUDIOIN_ANACLKCTRL 0x70 #define BM_AUDIOIN_ANACLKCTRL_CLKGATE 0x80000000 #define HW_AUDIOIN_DATA 0x80 + +#define BM_AUDIOIN_MICLINE_MIC_SELECT 0x01000000 +#define BP_AUDIOIN_MICLINE_MIC_RESISTOR 20 +#define BM_AUDIOIN_MICLINE_MIC_RESISTOR 0x00300000 diff --git a/arch/arm/mach-stmp378x/include/mach/regs-audioout.h b/arch/arm/mach-stmp378x/include/mach/regs-audioout.h index f533e23694a0..59c5328e9577 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-audioout.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-audioout.h @@ -51,6 +51,13 @@ #define HW_AUDIOOUT_DACDEBUG 0x40 +#define BP_AUDIOOUT_DACVOLUME_VOLUME_LEFT 16 +#define BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT 0x00FF0000 +#define BM_AUDIOOUT_DACVOLUME_VOLUME_UPDATE_RIGHT 0x00001000 +#define BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT 0x00000100 +#define BP_AUDIOOUT_DACVOLUME_VOLUME_RIGHT 0 +#define BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT 0x000000FF + #define HW_AUDIOOUT_HPVOL 0x50 #define BM_AUDIOOUT_HPVOL_MUTE 0x01000000 #define BM_AUDIOOUT_HPVOL_EN_MSTR_ZCD 0x02000000 diff --git a/arch/arm/mach-stmp378x/include/mach/regs-dcp.h b/arch/arm/mach-stmp378x/include/mach/regs-dcp.h index fdedd00c0e28..ac53087f39c2 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-dcp.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-dcp.h @@ -63,19 +63,22 @@ #define BM_DCP_PACKET2_CIPHER_CFG 0xFF000000 #define BP_DCP_PACKET2_CIPHER_CFG 24 +#define BV_DCP_PACKET2_CIPHER_MODE__ECB 0x00 +#define BV_DCP_PACKET2_CIPHER_SELECT__AES128 0x00 + #define HW_DCP_CH0CMDPTR (0x100 + 0 * 0x40) #define HW_DCP_CH1CMDPTR (0x100 + 1 * 0x40) #define HW_DCP_CH2CMDPTR (0x100 + 2 * 0x40) #define HW_DCP_CH3CMDPTR (0x100 + 3 * 0x40) -#define HW_DCP_CHnCMDPTR 0x100 +#define HW_DCP_CHnCMDPTR(n) (0x100 + n * 0x40) #define HW_DCP_CH0SEMA (0x110 + 0 * 0x40) #define HW_DCP_CH1SEMA (0x110 + 1 * 0x40) #define HW_DCP_CH2SEMA (0x110 + 2 * 0x40) #define HW_DCP_CH3SEMA (0x110 + 3 * 0x40) -#define HW_DCP_CHnSEMA 0x110 +#define HW_DCP_CHnSEMA(n) (0x110 + n * 0x40) #define BM_DCP_CHnSEMA_INCREMENT 0x000000FF #define BP_DCP_CHnSEMA_INCREMENT 0 @@ -84,4 +87,24 @@ #define HW_DCP_CH2STAT (0x120 + 2 * 0x40) #define HW_DCP_CH3STAT (0x120 + 3 * 0x40) -#define HW_DCP_CHnSTAT 0x120 +#define HW_DCP_CHnSTAT(n) (0x120 + n * 0x40) + +#define BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH0 0x01 +#define BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH1 0x02 +#define BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH2 0x04 +#define BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH3 0x08 + +#define HW_DCP_PACKET2_ADDR (REGS_DCP_BASE + 0x000000a0) +#define BP_DCP_PACKET2_CIPHER_CFG 24 +#define BM_DCP_PACKET2_CIPHER_CFG 0xFF000000 +#define BP_DCP_PACKET2_HASH_SELECT 16 +#define BM_DCP_PACKET2_HASH_SELECT 0x000F0000 +#define BV_DCP_PACKET2_HASH_SELECT__SHA1 0x00 +#define BV_DCP_PACKET2_HASH_SELECT__CRC32 0x01 +#define BP_DCP_PACKET2_KEY_SELECT 8 + +#define BV_DCP_PACKET2_CIPHER_MODE__ECB 0x00 +#define BV_DCP_PACKET2_CIPHER_MODE__CBC 0x01 +#define BP_DCP_PACKET2_CIPHER_SELECT 0 +#define BM_DCP_PACKET2_CIPHER_SELECT 0x0000000F +#define BV_DCP_PACKET2_CIPHER_SELECT__AES128 0x00 diff --git a/arch/arm/mach-stmp378x/include/mach/regs-gpmi.h b/arch/arm/mach-stmp378x/include/mach/regs-gpmi.h index 2cc8bbe91687..47a150bbb582 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-gpmi.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-gpmi.h @@ -53,6 +53,9 @@ #define BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_4_BIT 1 #define BV_GPMI_ECCCTRL_ECC_CMD__DECODE_8_BIT 2 #define BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_8_BIT 3 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_AUXONLY 0x100 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_PAGE 0x1FF +#define BV_GPMI_ECCCTRL_BUFFER_MASK__AUXILIARY 0x100 #define HW_GPMI_CTRL1 0x60 #define BM_GPMI_CTRL1_GPMI_MODE 0x00000001 diff --git a/arch/arm/mach-stmp378x/include/mach/regs-icoll.h b/arch/arm/mach-stmp378x/include/mach/regs-icoll.h index f996e80f40e7..57febd8559e7 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-icoll.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-icoll.h @@ -37,9 +37,14 @@ #define HW_ICOLL_STAT 0x70 -#define HW_ICOLL_INTERRUPTn 0x120 - -#define HW_ICOLL_INTERRUPTn 0x120 +#define HW_ICOLL_INTERRUPTn(n) (0x120 + n * 0x10) #define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004 +#define HW_ICOLL_PRIORITYn(n) (0x60 + n * 0x10) + +#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1 +#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL1 0x2 +#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL2 0x4 +#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL3 0x8 + #endif diff --git a/arch/arm/mach-stmp378x/include/mach/regs-lradc.h b/arch/arm/mach-stmp378x/include/mach/regs-lradc.h index cb8cb06f8277..3b76d5f6bed8 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-lradc.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-lradc.h @@ -51,6 +51,9 @@ #define BM_LRADC_CTRL2_BL_ENABLE 0x00400000 #define BM_LRADC_CTRL2_DIVIDE_BY_TWO 0xFF000000 #define BP_LRADC_CTRL2_DIVIDE_BY_TWO 24 +#define BM_LRADC_CTRL2_TEMPSENSE_PWD 0x00008000 +#define BV_LRADC_CTRL2_TEMPSENSE_PWD__ENABLE 0x0 +#define BV_LRADC_CTRL2_TEMPSENSE_PWD__DISABLE 0x1 #define HW_LRADC_CTRL3 0x30 #define BM_LRADC_CTRL3_CYCLE_TIME 0x00000300 @@ -69,7 +72,7 @@ #define HW_LRADC_CH6 (0x50 + 6 * 0x10) #define HW_LRADC_CH7 (0x50 + 7 * 0x10) -#define HW_LRADC_CHn 0x50 +#define HW_LRADC_CHn(chn) (0x50 + chn * 0x10) #define BM_LRADC_CHn_VALUE 0x0003FFFF #define BP_LRADC_CHn_VALUE 0 #define BM_LRADC_CHn_NUM_SAMPLES 0x1F000000 @@ -81,7 +84,7 @@ #define HW_LRADC_DELAY2 (0xD0 + 2 * 0x10) #define HW_LRADC_DELAY3 (0xD0 + 3 * 0x10) -#define HW_LRADC_DELAYn 0xD0 +#define HW_LRADC_DELAYn(chn) (0xD0 + chn * 0x10) #define BM_LRADC_DELAYn_DELAY 0x000007FF #define BP_LRADC_DELAYn_DELAY 0 #define BM_LRADC_DELAYn_LOOP_COUNT 0x0000F800 @@ -97,3 +100,17 @@ #define BP_LRADC_CTRL4_LRADC6SELECT 24 #define BM_LRADC_CTRL4_LRADC7SELECT 0xF0000000 #define BP_LRADC_CTRL4_LRADC7SELECT 28 + +#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYA 0x6 +#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYB 0x7 + +#define HW_LRADC_CONVERSION 0x130 +#define BM_LRADC_CONVERSION_AUTOMATIC 0x00100000 +#define BV_LRADC_CONVERSION_AUTOMATIC__DISABLE 0x0 +#define BV_LRADC_CONVERSION_AUTOMATIC__ENABLE 0x1 +#define BP_LRADC_CONVERSION_SCALE_FACTOR 16 +#define BM_LRADC_CONVERSION_SCALE_FACTOR 0x00030000 + +#define BM_LRADC_CTRL1_LRADC7_IRQ 0x00000080 +#define BV_LRADC_CTRL1_LRADC7_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_LRADC7_IRQ__PENDING 0x1 diff --git a/arch/arm/mach-stmp378x/include/mach/regs-ocotp.h b/arch/arm/mach-stmp378x/include/mach/regs-ocotp.h index f0af64d9937e..06f151f9e55d 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-ocotp.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-ocotp.h @@ -29,6 +29,8 @@ #define BM_OCOTP_CTRL_RELOAD_SHADOWS 0x00002000 #define BM_OCOTP_CTRL_WR_UNLOCK 0xFFFF0000 #define BP_OCOTP_CTRL_WR_UNLOCK 16 +#define BP_OCOTP_CTRL_ADDR 0 +#define BM_OCOTP_CTRL_ADDR 0x0000001F #define HW_OCOTP_DATA 0x10 @@ -37,4 +39,6 @@ #define HW_OCOTP_CUST2 (0x20 + 2 * 0x10) #define HW_OCOTP_CUST3 (0x20 + 3 * 0x10) -#define HW_OCOTP_CUSTn 0x20 +#define HW_OCOTP_CUSTn(n) (0x20 + n * 0x10) + +#define HW_OCOTP_CUSTCAP 0x110 diff --git a/arch/arm/mach-stmp378x/include/mach/regs-power.h b/arch/arm/mach-stmp378x/include/mach/regs-power.h index e454c830f076..e3438ecb6eab 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-power.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-power.h @@ -35,6 +35,8 @@ #define HW_POWER_5VCTRL 0x10 #define BM_POWER_5VCTRL_ENABLE_LINREG_ILIMIT 0x00000040 +#define HW_POWER_LOOPCTRL 0xb0 + #define HW_POWER_MINPWR 0x20 #define HW_POWER_CHARGE 0x30 @@ -60,4 +62,235 @@ #define BM_POWER_DEBUG_AVALIDPIOLOCK 0x00000004 #define BM_POWER_DEBUG_VBUSVALIDPIOLOCK 0x00000008 +#define BP_POWER_STS_PSWITCH 20 +#define BM_POWER_STS_PSWITCH 0x00300000 +#define BM_POWER_CTRL_POLARITY_PSWITCH 0x00040000 + +#define BM_POWER_CTRL_CLKGATE 0x40000000 +#define BM_POWER_CTRL_PSWITCH_MID_TRAN 0x08000000 +#define BM_POWER_CTRL_DCDC4P2_BO_IRQ 0x01000000 +#define BM_POWER_CTRL_ENIRQ_DCDC4P2_BO 0x00800000 +#define BM_POWER_CTRL_VDD5V_DROOP_IRQ 0x00400000 +#define BM_POWER_CTRL_ENIRQ_VDD5V_DROOP 0x00200000 +#define BM_POWER_CTRL_PSWITCH_IRQ 0x00100000 +#define BM_POWER_CTRL_PSWITCH_IRQ_SRC 0x00080000 +#define BM_POWER_CTRL_POLARITY_PSWITCH 0x00040000 +#define BM_POWER_CTRL_ENIRQ_PSWITCH 0x00020000 +#define BM_POWER_CTRL_POLARITY_DC_OK 0x00010000 +#define BM_POWER_CTRL_DC_OK_IRQ 0x00008000 +#define BM_POWER_CTRL_ENIRQ_DC_OK 0x00004000 +#define BM_POWER_CTRL_BATT_BO_IRQ 0x00002000 +#define BM_POWER_CTRL_ENIRQBATT_BO 0x00001000 +#define BM_POWER_CTRL_VDDIO_BO_IRQ 0x00000800 +#define BM_POWER_CTRL_ENIRQ_VDDIO_BO 0x00000400 +#define BM_POWER_CTRL_VDDA_BO_IRQ 0x00000200 +#define BM_POWER_CTRL_ENIRQ_VDDA_BO 0x00000100 +#define BM_POWER_CTRL_VDDD_BO_IRQ 0x00000080 +#define BM_POWER_CTRL_ENIRQ_VDDD_BO 0x00000040 +#define BM_POWER_CTRL_POLARITY_VBUSVALID 0x00000020 +#define BM_POWER_CTRL_VBUSVALID_IRQ 0x00000010 +#define BM_POWER_CTRL_ENIRQ_VBUS_VALID 0x00000008 +#define BM_POWER_CTRL_POLARITY_VDD5V_GT_VDDIO 0x00000004 +#define BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ 0x00000002 +#define BM_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO 0x00000001 + +#define BP_POWER_5VCTRL_VBUSDROOP_TRSH 28 +#define BM_POWER_5VCTRL_VBUSDROOP_TRSH 0x30000000 +#define BP_POWER_5VCTRL_HEADROOM_ADJ 24 +#define BM_POWER_5VCTRL_HEADROOM_ADJ 0x07000000 +#define BM_POWER_5VCTRL_PWD_CHARGE_4P2 0x00100000 +#define BP_POWER_5VCTRL_CHARGE_4P2_ILIMIT 12 +#define BM_POWER_5VCTRL_CHARGE_4P2_ILIMIT 0x0003F000 +#define BP_POWER_5VCTRL_VBUSVALID_TRSH 8 +#define BM_POWER_5VCTRL_VBUSVALID_TRSH 0x00000700 +#define BM_POWER_5VCTRL_PWDN_5VBRNOUT 0x00000080 +#define BM_POWER_5VCTRL_ENABLE_LINREG_ILIMIT 0x00000040 +#define BM_POWER_5VCTRL_DCDC_XFER 0x00000020 +#define BM_POWER_5VCTRL_VBUSVALID_5VDETECT 0x00000010 +#define BM_POWER_5VCTRL_VBUSVALID_TO_B 0x00000008 +#define BM_POWER_5VCTRL_ILIMIT_EQ_ZERO 0x00000004 +#define BM_POWER_5VCTRL_PWRUP_VBUS_CMPS 0x00000002 +#define BM_POWER_5VCTRL_ENABLE_DCDC 0x00000001 + +#define BM_POWER_MINPWR_LOWPWR_4P2 0x00004000 +#define BM_POWER_MINPWR_VDAC_DUMP_CTRL 0x00002000 +#define BM_POWER_MINPWR_PWD_BO 0x00001000 +#define BM_POWER_MINPWR_USE_VDDXTAL_VBG 0x00000800 +#define BM_POWER_MINPWR_PWD_ANA_CMPS 0x00000400 +#define BM_POWER_MINPWR_ENABLE_OSC 0x00000200 +#define BM_POWER_MINPWR_SELECT_OSC 0x00000100 +#define BM_POWER_MINPWR_VBG_OFF 0x00000080 +#define BM_POWER_MINPWR_DOUBLE_FETS 0x00000040 +#define BM_POWER_MINPWR_HALF_FETS 0x00000020 +#define BM_POWER_MINPWR_LESSANA_I 0x00000010 +#define BM_POWER_MINPWR_PWD_XTAL24 0x00000008 +#define BM_POWER_MINPWR_DC_STOPCLK 0x00000004 +#define BM_POWER_MINPWR_EN_DC_PFM 0x00000002 +#define BM_POWER_MINPWR_DC_HALFCLK 0x00000001 + +#define BP_POWER_CHARGE_ADJ_VOLT 24 +#define BM_POWER_CHARGE_ADJ_VOLT 0x07000000 +#define BM_POWER_CHARGE_RSRVD3 0x00800000 +#define BM_POWER_CHARGE_ENABLE_LOAD 0x00400000 +#define BM_POWER_CHARGE_ENABLE_CHARGER_RESISTORS 0x00200000 +#define BM_POWER_CHARGE_ENABLE_FAULT_DETECT 0x00100000 +#define BM_POWER_CHARGE_CHRG_STS_OFF 0x00080000 +#define BM_POWER_CHARGE_USE_EXTERN_R 0x00020000 +#define BM_POWER_CHARGE_PWD_BATTCHRG 0x00010000 +#define BP_POWER_CHARGE_STOP_ILIMIT 8 +#define BM_POWER_CHARGE_STOP_ILIMIT 0x00000F00 +#define BP_POWER_CHARGE_BATTCHRG_I 0 +#define BM_POWER_CHARGE_BATTCHRG_I 0x0000003F + +#define BP_POWER_VDDDCTRL_ADJTN 28 +#define BM_POWER_VDDDCTRL_ADJTN 0xF0000000 +#define BM_POWER_VDDDCTRL_PWDN_BRNOUT 0x00800000 +#define BM_POWER_VDDDCTRL_DISABLE_STEPPING 0x00400000 +#define BM_POWER_VDDDCTRL_ENABLE_LINREG 0x00200000 +#define BM_POWER_VDDDCTRL_DISABLE_FET 0x00100000 +#define BP_POWER_VDDDCTRL_LINREG_OFFSET 16 +#define BM_POWER_VDDDCTRL_LINREG_OFFSET 0x00030000 +#define BP_POWER_VDDDCTRL_BO_OFFSET 8 +#define BM_POWER_VDDDCTRL_BO_OFFSET 0x00000700 +#define BP_POWER_VDDDCTRL_TRG 0 +#define BM_POWER_VDDDCTRL_TRG 0x0000001F + +#define BM_POWER_VDDACTRL_PWDN_BRNOUT 0x00080000 +#define BM_POWER_VDDACTRL_DISABLE_STEPPING 0x00040000 +#define BM_POWER_VDDACTRL_ENABLE_LINREG 0x00020000 +#define BM_POWER_VDDACTRL_DISABLE_FET 0x00010000 +#define BP_POWER_VDDACTRL_LINREG_OFFSET 12 +#define BM_POWER_VDDACTRL_LINREG_OFFSET 0x00003000 +#define BP_POWER_VDDACTRL_BO_OFFSET 8 +#define BM_POWER_VDDACTRL_BO_OFFSET 0x00000700 +#define BP_POWER_VDDACTRL_TRG 0 +#define BM_POWER_VDDACTRL_TRG 0x0000001F + +#define BP_POWER_VDDIOCTRL_ADJTN 20 +#define BM_POWER_VDDIOCTRL_ADJTN 0x00F00000 +#define BM_POWER_VDDIOCTRL_PWDN_BRNOUT 0x00040000 +#define BM_POWER_VDDIOCTRL_DISABLE_STEPPING 0x00020000 +#define BM_POWER_VDDIOCTRL_DISABLE_FET 0x00010000 +#define BP_POWER_VDDIOCTRL_LINREG_OFFSET 12 +#define BM_POWER_VDDIOCTRL_LINREG_OFFSET 0x00003000 +#define BP_POWER_VDDIOCTRL_BO_OFFSET 8 +#define BM_POWER_VDDIOCTRL_BO_OFFSET 0x00000700 +#define BP_POWER_VDDIOCTRL_TRG 0 +#define BM_POWER_VDDIOCTRL_TRG 0x0000001F + +#define HW_POWER_VDDMEMCTRL (REGS_POWER_BASE + 0x00000070) +#define BM_POWER_VDDMEMCTRL_PULLDOWN_ACTIVE 0x00000400 +#define BM_POWER_VDDMEMCTRL_ENABLE_ILIMIT 0x00000200 +#define BM_POWER_VDDMEMCTRL_ENABLE_LINREG 0x00000100 +#define BP_POWER_VDDMEMCTRL_TRG 0 +#define BM_POWER_VDDMEMCTRL_TRG 0x0000001F + +#define HW_POWER_DCDC4P2 (REGS_POWER_BASE + 0x00000080) +#define BP_POWER_DCDC4P2_DROPOUT_CTRL 28 +#define BM_POWER_DCDC4P2_DROPOUT_CTRL 0xF0000000 + +#define BP_POWER_DCDC4P2_ISTEAL_THRESH 24 +#define BM_POWER_DCDC4P2_ISTEAL_THRESH 0x03000000 +#define BM_POWER_DCDC4P2_ENABLE_4P2 0x00800000 +#define BM_POWER_DCDC4P2_ENABLE_DCDC 0x00400000 +#define BM_POWER_DCDC4P2_HYST_DIR 0x00200000 +#define BM_POWER_DCDC4P2_HYST_THRESH 0x00100000 +#define BP_POWER_DCDC4P2_TRG 16 +#define BM_POWER_DCDC4P2_TRG 0x00070000 +#define BP_POWER_DCDC4P2_BO 8 +#define BM_POWER_DCDC4P2_BO 0x00001F00 +#define BP_POWER_DCDC4P2_CMPTRIP 0 +#define BM_POWER_DCDC4P2_CMPTRIP 0x0000001F + +#define HW_POWER_MISC (REGS_POWER_BASE + 0x00000090) +#define BP_POWER_MISC_FREQSEL 4 +#define BM_POWER_MISC_FREQSEL 0x00000070 +#define BM_POWER_MISC_RSRVD1 0x00000008 +#define BM_POWER_MISC_DELAY_TIMING 0x00000004 +#define BM_POWER_MISC_TEST 0x00000002 +#define BM_POWER_MISC_SEL_PLLCLK 0x00000001 + +#define HW_POWER_DCLIMITS (REGS_POWER_BASE + 0x000000a0) +#define BP_POWER_DCLIMITS_POSLIMIT_BUCK 8 +#define BM_POWER_DCLIMITS_POSLIMIT_BUCK 0x00007F00 +#define BP_POWER_DCLIMITS_NEGLIMIT 0 +#define BM_POWER_DCLIMITS_NEGLIMIT 0x0000007F + +#define BM_POWER_LOOPCTRL_TOGGLE_DIF 0x00100000 +#define BM_POWER_LOOPCTRL_HYST_SIGN 0x00080000 +#define BM_POWER_LOOPCTRL_EN_CM_HYST 0x00040000 +#define BM_POWER_LOOPCTRL_EN_DF_HYST 0x00020000 +#define BM_POWER_LOOPCTRL_CM_HYST_THRESH 0x00010000 +#define BM_POWER_LOOPCTRL_DF_HYST_THRESH 0x00008000 +#define BM_POWER_LOOPCTRL_RCSCALE_THRESH 0x00004000 +#define BP_POWER_LOOPCTRL_EN_RCSCALE 12 +#define BM_POWER_LOOPCTRL_EN_RCSCALE 0x00003000 +#define BP_POWER_LOOPCTRL_DC_FF 8 +#define BM_POWER_LOOPCTRL_DC_FF 0x00000700 +#define BP_POWER_LOOPCTRL_DC_R 4 +#define BM_POWER_LOOPCTRL_DC_R 0x000000F0 +#define BP_POWER_LOOPCTRL_DC_C 0 +#define BM_POWER_LOOPCTRL_DC_C 0x00000003 + +#define BP_POWER_STS_PWRUP_SOURCE 24 +#define BM_POWER_STS_PWRUP_SOURCE 0x3F000000 +#define BP_POWER_STS_PSWITCH 20 +#define BM_POWER_STS_PSWITCH 0x00300000 +#define BM_POWER_STS_AVALID_STATUS 0x00020000 +#define BM_POWER_STS_BVALID_STATUS 0x00010000 +#define BM_POWER_STS_VBUSVALID_STATUS 0x00008000 +#define BM_POWER_STS_SESSEND_STATUS 0x00004000 +#define BM_POWER_STS_BATT_BO 0x00002000 +#define BM_POWER_STS_VDD5V_FAULT 0x00001000 +#define BM_POWER_STS_CHRGSTS 0x00000800 +#define BM_POWER_STS_DCDC_4P2_BO 0x00000400 +#define BM_POWER_STS_DC_OK 0x00000200 +#define BM_POWER_STS_VDDIO_BO 0x00000100 +#define BM_POWER_STS_VDDA_BO 0x00000080 +#define BM_POWER_STS_VDDD_BO 0x00000040 +#define BM_POWER_STS_VDD5V_GT_VDDIO 0x00000020 +#define BM_POWER_STS_VDD5V_DROOP 0x00000010 +#define BM_POWER_STS_AVALID 0x00000008 +#define BM_POWER_STS_BVALID 0x00000004 +#define BM_POWER_STS_VBUSVALID 0x00000002 +#define BM_POWER_STS_SESSEND 0x00000001 + +#define HW_POWER_SPEED (REGS_POWER_BASE + 0x000000d0) +#define BP_POWER_SPEED_STATUS 16 +#define BM_POWER_SPEED_STATUS 0x00FF0000 +#define BP_POWER_SPEED_CTRL 0 +#define BM_POWER_SPEED_CTRL 0x00000003 + +#define HW_POWER_BATTMONITOR 0xe0 +#define BP_POWER_BATTMONITOR_BATT_VAL 16 +#define BM_POWER_BATTMONITOR_BATT_VAL 0x03FF0000 +#define BM_POWER_BATTMONITOR_EN_BATADJ 0x00000400 +#define BM_POWER_BATTMONITOR_PWDN_BATTBRNOUT 0x00000200 +#define BM_POWER_BATTMONITOR_BRWNOUT_PWD 0x00000100 +#define BP_POWER_BATTMONITOR_BRWNOUT_LVL 0 +#define BM_POWER_BATTMONITOR_BRWNOUT_LVL 0x0000001F + +#define BP_POWER_RESET_UNLOCK 16 +#define BM_POWER_RESET_UNLOCK 0xFFFF0000 +#define BV_POWER_RESET_UNLOCK__KEY 0x3E77 +#define BM_POWER_RESET_PWD_OFF 0x00000002 +#define BM_POWER_RESET_PWD 0x00000001 + +#define BM_POWER_DEBUG_VBUSVALIDPIOLOCK 0x00000008 +#define BM_POWER_DEBUG_AVALIDPIOLOCK 0x00000004 +#define BM_POWER_DEBUG_BVALIDPIOLOCK 0x00000002 +#define BM_POWER_DEBUG_SESSENDPIOLOCK 0x00000001 + +#define HW_POWER_SPECIAL (REGS_POWER_BASE + 0x00000120) +#define BP_POWER_SPECIAL_TEST 0 +#define BM_POWER_SPECIAL_TEST 0xFFFFFFFF + +#define HW_POWER_VERSION (REGS_POWER_BASE + 0x00000130) +#define BP_POWER_VERSION_MAJOR 24 +#define BM_POWER_VERSION_MAJOR 0xFF000000 +#define BP_POWER_VERSION_MINOR 16 +#define BM_POWER_VERSION_MINOR 0x00FF0000 +#define BP_POWER_VERSION_STEP 0 +#define BM_POWER_VERSION_STEP 0x0000FFFF + #endif diff --git a/arch/arm/mach-stmp378x/include/mach/regs-pwm.h b/arch/arm/mach-stmp378x/include/mach/regs-pwm.h index 0d0f9e56ec77..2b653c20e302 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-pwm.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-pwm.h @@ -31,7 +31,7 @@ #define HW_PWM_ACTIVE2 (0x10 + 2 * 0x20) #define HW_PWM_ACTIVE3 (0x10 + 3 * 0x20) -#define HW_PWM_ACTIVEn 0x10 +#define HW_PWM_ACTIVEn(n) (0x10 + n * 0x20) #define BM_PWM_ACTIVEn_ACTIVE 0x0000FFFF #define BP_PWM_ACTIVEn_ACTIVE 0 #define BM_PWM_ACTIVEn_INACTIVE 0xFFFF0000 @@ -42,7 +42,7 @@ #define HW_PWM_PERIOD2 (0x20 + 2 * 0x20) #define HW_PWM_PERIOD3 (0x20 + 3 * 0x20) -#define HW_PWM_PERIODn 0x20 +#define HW_PWM_PERIODn(n) (0x20 + n * 0x20) #define BM_PWM_PERIODn_PERIOD 0x0000FFFF #define BP_PWM_PERIODn_PERIOD 0 #define BM_PWM_PERIODn_ACTIVE_STATE 0x00030000 diff --git a/arch/arm/mach-stmp378x/include/mach/regs-pxp.h b/arch/arm/mach-stmp378x/include/mach/regs-pxp.h index 54d297896de8..321467d90173 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-pxp.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-pxp.h @@ -26,10 +26,26 @@ #define BM_PXP_CTRL_ENABLE 0x00000001 #define BP_PXP_CTRL_ENABLE 0 #define BM_PXP_CTRL_IRQ_ENABLE 0x00000002 + #define BM_PXP_CTRL_OUTPUT_RGB_FORMAT 0x000000F0 #define BP_PXP_CTRL_OUTPUT_RGB_FORMAT 4 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__ARGB8888 0x0 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__RGB888 0x1 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__RGB888P 0x2 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__ARGB1555 0x3 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__RGB565 0x4 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__RGB555 0x5 + #define BM_PXP_CTRL_ROTATE 0x00000300 #define BP_PXP_CTRL_ROTATE 8 + +#define BM_PXP_CTRL_S0_FORMAT 0x0000F000 +#define BV_PXP_CTRL_S0_FORMAT__RGB888 0x1 +#define BV_PXP_CTRL_S0_FORMAT__RGB565 0x4 +#define BV_PXP_CTRL_S0_FORMAT__RGB555 0x5 +#define BV_PXP_CTRL_S0_FORMAT__YUV422 0x8 +#define BV_PXP_CTRL_S0_FORMAT__YUV420 0x9 + #define BM_PXP_CTRL_HFLIP 0x00000400 #define BM_PXP_CTRL_VFLIP 0x00000800 #define BM_PXP_CTRL_S0_FORMAT 0x0000F000 @@ -138,3 +154,13 @@ #define BP_PXP_OLnPARAM_FORMAT 4 #define BM_PXP_OLnPARAM_ALPHA 0x0000FF00 #define BP_PXP_OLnPARAM_ALPHA 8 +#define BV_PXP_OLnPARAM_FORMAT__ARGB8888 0x0 +#define BV_PXP_OLnPARAM_FORMAT__RGB888 0x1 +#define BV_PXP_OLnPARAM_FORMAT__ARGB1555 0x3 +#define BV_PXP_OLnPARAM_FORMAT__RGB565 0x4 +#define BV_PXP_OLnPARAM_FORMAT__RGB555 0x5 +#define BM_PXP_OLnPARAM_ENABLE_COLORKEY 0x00000008 +#define BV_PXP_OLnPARAM_ALPHA_CNTL__Embedded 0x0 +#define BV_PXP_OLnPARAM_ALPHA_CNTL__Override 0x1 +#define BV_PXP_OLnPARAM_ALPHA_CNTL__Multiply 0x2 +#define BV_PXP_OLnPARAM_ALPHA_CNTL__ROPs 0x3 diff --git a/arch/arm/mach-stmp378x/include/mach/regs-timrot.h b/arch/arm/mach-stmp378x/include/mach/regs-timrot.h index b5527957c67f..8a927c4821e4 100644 --- a/arch/arm/mach-stmp378x/include/mach/regs-timrot.h +++ b/arch/arm/mach-stmp378x/include/mach/regs-timrot.h @@ -65,4 +65,17 @@ #define HW_TIMROT_TIMCOUNTn 0x30 +#define BV_TIMROT_ROTCTRL_OVERSAMPLE__8X 0x0 +#define BV_TIMROT_ROTCTRL_OVERSAMPLE__4X 0x1 +#define BV_TIMROT_ROTCTRL_OVERSAMPLE__2X 0x2 +#define BV_TIMROT_ROTCTRL_OVERSAMPLE__1X 0x3 +#define BM_TIMROT_ROTCTRL_POLARITY_B 0x00000200 +#define BM_TIMROT_ROTCTRL_POLARITY_A 0x00000100 +#define BP_TIMROT_ROTCTRL_SELECT_B 4 +#define BM_TIMROT_ROTCTRL_SELECT_B 0x00000070 +#define BV_TIMROT_ROTCTRL_SELECT_B__ROTARYA 0x6 +#define BV_TIMROT_ROTCTRL_SELECT_B__ROTARYB 0x7 +#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYA 0x6 +#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYB 0x7 + #endif |