diff options
| author | Gary King <gking@nvidia.com> | 2010-05-05 13:41:41 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-05-05 14:22:53 -0700 |
| commit | 70301da34be0ec3a9e5687225f3160969efb6938 (patch) | |
| tree | 4b7433e8801caa06b0f92eb9d4ab322859296a68 /arch/arm/mach-tegra/Makefile | |
| parent | 04ba8b56ea3637e934a8c51e227cb61e64394117 (diff) | |
[ARM] tegra: add voltage rails and safe resets to the pin group table
the reset values for some pin groups in the tegra pin mux can result in
functional errors due to conflicting with actively-configured pin groups
muxing from the same controller. this change adds a known safe, non-
conflicting mux for every pin group, which can be used on platforms
where the pin group is not routed to any peripheral
also add each pin group's I/O voltage rail, to enable platform code to
map from the pin groups used by each interface to the regulators used
for dynamic voltage control
Change-Id: I66f061ab81d470f23ca71150397b4c5bbdbf8a21
Diffstat (limited to 'arch/arm/mach-tegra/Makefile')
| -rw-r--r-- | arch/arm/mach-tegra/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 40287df9b9de..0557e4b90ca0 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -5,6 +5,7 @@ obj-y += clock.o obj-y += timer.o obj-y += gpio.o obj-y += suspend.o +obj-y += pinmux.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += cortex_a9_save.o |