diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-11-01 23:23:36 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2011-12-08 16:54:38 +0530 |
| commit | d6f914ce0a6043b8fcbe642b826eeea3a4d3d4cf (patch) | |
| tree | 836ed58bcdeb1ad121a9160725bb1225a1b90cbc /arch/arm/mach-tegra/board-cardhu-memory.c | |
| parent | 3b51e973ed77ea0792f36e8f099f8c3d07225c5e (diff) | |
ARM: tegra: cardhu: Update dvfs tables for elpida & samsung
Added dynamic self-refresh field and updated arbitration settings.
Bug 896654
(cherry picked from commit 9af03dda41ee154ce7d3818f70456e833a22c893)
(cherry picked from commit f05bd447cb8bc53ff2f98dca3db55c05f53ce29d)
Change-Id: I9f60a60bd0768a86735ccf4e8d0db772d9caeeb9
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/67023
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-cardhu-memory.c')
| -rw-r--r-- | arch/arm/mach-tegra/board-cardhu-memory.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu-memory.c b/arch/arm/mach-tegra/board-cardhu-memory.c index 7e7b934b23e9..f3b0ee72fee2 100644 --- a/arch/arm/mach-tegra/board-cardhu-memory.c +++ b/arch/arm/mach-tegra/board-cardhu-memory.c @@ -1621,7 +1621,7 @@ static const struct tegra_emc_table cardhu_emc_tables_k4p8g304eb[] = { 0x00000000, /* EMC_ODT_WRITE */ 0x00000000, /* EMC_ODT_READ */ 0x00004282, /* EMC_FBIO_CFG5 */ - 0x00780084, /* EMC_CFG_DIG_DLL */ + 0x007800a4, /* EMC_CFG_DIG_DLL */ 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */ 0x00098000, /* EMC_DLL_XFORM_DQS0 */ 0x00098000, /* EMC_DLL_XFORM_DQS1 */ @@ -1741,7 +1741,7 @@ static const struct tegra_emc_table cardhu_emc_tables_k4p8g304eb[] = { 0x00000000, /* EMC_ODT_WRITE */ 0x00000000, /* EMC_ODT_READ */ 0x00004282, /* EMC_FBIO_CFG5 */ - 0x00780084, /* EMC_CFG_DIG_DLL */ + 0x007800a4, /* EMC_CFG_DIG_DLL */ 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */ 0x000a0000, /* EMC_DLL_XFORM_DQS0 */ 0x000a0000, /* EMC_DLL_XFORM_DQS1 */ @@ -1861,7 +1861,7 @@ static const struct tegra_emc_table cardhu_emc_tables_k4p8g304eb[] = { 0x00000000, /* EMC_ODT_WRITE */ 0x00000000, /* EMC_ODT_READ */ 0x00004282, /* EMC_FBIO_CFG5 */ - 0x00780084, /* EMC_CFG_DIG_DLL */ + 0x007800a4, /* EMC_CFG_DIG_DLL */ 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */ 0x000a0000, /* EMC_DLL_XFORM_DQS0 */ 0x000a0000, /* EMC_DLL_XFORM_DQS1 */ @@ -1981,7 +1981,7 @@ static const struct tegra_emc_table cardhu_emc_tables_k4p8g304eb[] = { 0x00000000, /* EMC_ODT_WRITE */ 0x00000000, /* EMC_ODT_READ */ 0x00004282, /* EMC_FBIO_CFG5 */ - 0x00440084, /* EMC_CFG_DIG_DLL */ + 0x004400a4, /* EMC_CFG_DIG_DLL */ 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */ 0x00074000, /* EMC_DLL_XFORM_DQS0 */ 0x00074000, /* EMC_DLL_XFORM_DQS1 */ @@ -2224,7 +2224,7 @@ static const struct tegra_emc_table cardhu_emc_tables_edb8132b2ma[] = { 0x00000000, /* EMC_ODT_WRITE */ 0x00000000, /* EMC_ODT_READ */ 0x00004282, /* EMC_FBIO_CFG5 */ - 0x00780084, /* EMC_CFG_DIG_DLL */ + 0x007800a4, /* EMC_CFG_DIG_DLL */ 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */ 0x000a0000, /* EMC_DLL_XFORM_DQS0 */ 0x000a0000, /* EMC_DLL_XFORM_DQS1 */ @@ -2344,7 +2344,7 @@ static const struct tegra_emc_table cardhu_emc_tables_edb8132b2ma[] = { 0x00000000, /* EMC_ODT_WRITE */ 0x00000000, /* EMC_ODT_READ */ 0x00004282, /* EMC_FBIO_CFG5 */ - 0x00780084, /* EMC_CFG_DIG_DLL */ + 0x007800a4, /* EMC_CFG_DIG_DLL */ 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */ 0x000a0000, /* EMC_DLL_XFORM_DQS0 */ 0x000a0000, /* EMC_DLL_XFORM_DQS1 */ @@ -2464,7 +2464,7 @@ static const struct tegra_emc_table cardhu_emc_tables_edb8132b2ma[] = { 0x00000000, /* EMC_ODT_WRITE */ 0x00000000, /* EMC_ODT_READ */ 0x00004282, /* EMC_FBIO_CFG5 */ - 0x00780084, /* EMC_CFG_DIG_DLL */ + 0x007800a4, /* EMC_CFG_DIG_DLL */ 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */ 0x000a0000, /* EMC_DLL_XFORM_DQS0 */ 0x000a0000, /* EMC_DLL_XFORM_DQS1 */ @@ -2584,7 +2584,7 @@ static const struct tegra_emc_table cardhu_emc_tables_edb8132b2ma[] = { 0x00000000, /* EMC_ODT_WRITE */ 0x00000000, /* EMC_ODT_READ */ 0x00004282, /* EMC_FBIO_CFG5 */ - 0x00440084, /* EMC_CFG_DIG_DLL */ + 0x004400a4, /* EMC_CFG_DIG_DLL */ 0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */ 0x00070000, /* EMC_DLL_XFORM_DQS0 */ 0x00070000, /* EMC_DLL_XFORM_DQS1 */ |