diff options
| author | Laxman Dewangan <ldewangan@nvidia.com> | 2011-03-25 13:20:56 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:45:43 -0800 |
| commit | 2e973b66a454a76e50deba8a6d2db0a8c0ec8aa0 (patch) | |
| tree | 632886f3d83caff13357545d5e5dd09741f609c9 /arch/arm/mach-tegra/board-cardhu-pinmux.c | |
| parent | 8a6719d5c74ac48b5ecabe666062bbba2b5bfdd3 (diff) | |
arm: tegra: cardhu: Changing power control lines for cardhu-A03
The E1291-A03 uses the following pins for the different power rail
controls:
EN_VDD_BL1 --->PEX_L0_CLKREQ_N
EN_VDD_BL2 --->PEX_L0_PRSNT_N
EN_USB1_VBUS_EN_OC --->PEX_L1_CLKREQ_N
ENUSB3_VBUS_EN_OC --->PEX_L1_PRSNT_N
bug 807504
bug 797021
Original-Change-Id: Id3703bc799373e714501b60588298a2f1e052852
Reviewed-on: http://git-master/r/24269
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Original-Change-Id: I9d7aafa7794e6d9e05f01db6bde7ed4c91e9050e
Rebase-Id: R82d96f07d2b8f4c3d9e6609ee669ef0f28e15d65
Diffstat (limited to 'arch/arm/mach-tegra/board-cardhu-pinmux.c')
| -rw-r--r-- | arch/arm/mach-tegra/board-cardhu-pinmux.c | 39 |
1 files changed, 33 insertions, 6 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu-pinmux.c b/arch/arm/mach-tegra/board-cardhu-pinmux.c index d373ebf9c101..4ae60320e364 100644 --- a/arch/arm/mach-tegra/board-cardhu-pinmux.c +++ b/arch/arm/mach-tegra/board-cardhu-pinmux.c @@ -381,9 +381,6 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = { /* Power rails GPIO */ DEFAULT_PINMUX(SPI2_SCK, GMI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GMI_CS2_N, NAND, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GMI_RST_N, RSVD3, PULL_UP, TRISTATE, INPUT), - DEFAULT_PINMUX(GMI_AD15, NAND, PULL_UP, TRISTATE, INPUT), DEFAULT_PINMUX(GPIO_PBB4, VGP4, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW8, KBC, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT5, SDMMC3, PULL_UP, NORMAL, INPUT), @@ -399,6 +396,24 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = { static __initdata struct tegra_pingroup_config cardhu_pinmux_e118x[] = { /* Power rails GPIO */ DEFAULT_PINMUX(SPI2_SCK, SPI2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS2_N, NAND, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_RST_N, RSVD3, PULL_UP, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD15, NAND, PULL_UP, TRISTATE, INPUT), +}; + +static __initdata struct tegra_pingroup_config cardhu_pinmux_cardhu[] = { + /* Power rails GPIO */ + DEFAULT_PINMUX(GMI_CS2_N, NAND, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_RST_N, RSVD3, PULL_UP, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD15, NAND, PULL_UP, TRISTATE, INPUT), +}; + +static __initdata struct tegra_pingroup_config cardhu_pinmux_cardhu_a03[] = { + /* Power rails GPIO */ + DEFAULT_PINMUX(PEX_L0_PRSNT_N, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L0_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L1_CLKREQ_N, RSVD3, PULL_UP, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_L1_PRSNT_N, NAND, PULL_UP, TRISTATE, INPUT), }; static __initdata struct tegra_pingroup_config cardhu_pinmux_e1198[] = { @@ -418,13 +433,25 @@ int __init cardhu_pinmux_init(void) ARRAY_SIZE(cardhu_drive_pinmux)); tegra_get_board_info(&board_info); - if ((board_info.board_id == BOARD_E1291) || - (board_info.board_id == BOARD_E1198)) { + switch (board_info.board_id) { + case BOARD_E1198: + tegra_pinmux_config_table(cardhu_pinmux_cardhu, + ARRAY_SIZE(cardhu_pinmux_cardhu)); tegra_pinmux_config_table(cardhu_pinmux_e1198, ARRAY_SIZE(cardhu_pinmux_e1198)); - } else { + break; + case BOARD_E1291: + if (board_info.fab < 0x3) + tegra_pinmux_config_table(cardhu_pinmux_cardhu, + ARRAY_SIZE(cardhu_pinmux_cardhu)); + else + tegra_pinmux_config_table(cardhu_pinmux_cardhu_a03, + ARRAY_SIZE(cardhu_pinmux_cardhu_a03)); + break; + default: tegra_pinmux_config_table(cardhu_pinmux_e118x, ARRAY_SIZE(cardhu_pinmux_e118x)); + break; } return 0; } |