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authorJay Agarwal <jagarwal@nvidia.com>2012-05-18 12:16:28 +0530
committerMatthew Pedro <mapedro@nvidia.com>2012-05-30 19:02:37 -0700
commite6d7d2f5e4028455655cbd7c35f086f71a4aba02 (patch)
tree9f4442606121f668bc281b36f07203830f177c1a /arch/arm/mach-tegra/board-enterprise-power.c
parentaa4b41b19470df86db62fb245532d2c6626b46b0 (diff)
arm: tegra: pcie: resolve flaw in lp0 save statetegra-l4t-r15-rc
1. Restoring control register correctly. 2. Enabling clock clamping while resume Bug 959642 Reviewed-on: http://git-master/r/103127 Change-Id: If3de1a029ec7bd94f1e584a5bbc90affdfb4f468 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/105347 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
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