diff options
| author | Dongfang Shi <dshi@nvidia.com> | 2012-05-08 15:24:25 -0700 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-06-12 17:17:46 -0700 |
| commit | 4a5cfb62d9aa2abcd3c0ae63a76cafd77fb78ae3 (patch) | |
| tree | 09200c08bf649e84397e1173e794803215a8d2fb /arch/arm/mach-tegra/board-p1852-panel.c | |
| parent | c7d35b5a710eb5a2742a00e1726df43a7160f53b (diff) | |
arm: tegra: p1852: drive touch panel with resolution 1366x768
Enable WXGA display and touch input for p1852 touch panel.
board-p1852-panel.c:
added WXGA timing for atmel touch panel.
board-p1852.c:
initialize touch panel if touch input is defined.
board-p1852.h:
added p1852 touch panel GPIO and bus.
tegra_p1852_gnu_linux_defconfig:
added touch panel flags, not defined by default.
bug 936232
Change-Id: Ia50b991f6aa5ed0ece458ad3871a68684a9234a6
Signed-off-by: Dongfang Shi <dshi@nvidia.com>
Reviewed-on: http://git-master/r/101348
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-p1852-panel.c')
| -rw-r--r-- | arch/arm/mach-tegra/board-p1852-panel.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-p1852-panel.c b/arch/arm/mach-tegra/board-p1852-panel.c index ee4c4671a48f..c104b913518e 100644 --- a/arch/arm/mach-tegra/board-p1852-panel.c +++ b/arch/arm/mach-tegra/board-p1852-panel.c @@ -39,6 +39,63 @@ static int p1852_panel_disable(void) return 0; } +#ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT + +static struct tegra_dc_mode p1852_panel_modes[] = { + { + /* 1366x768@60Hz */ + .pclk = 74180000, + .h_ref_to_sync = 1, + .v_ref_to_sync = 1, + .h_sync_width = 30, + .v_sync_width = 5, + .h_back_porch = 52, + .v_back_porch = 20, + .h_active = 1366, + .v_active = 768, + .h_front_porch = 64, + .v_front_porch = 25, + }, + { + /* 1366x768@50Hz */ + .pclk = 74180000, + .h_ref_to_sync = 1, + .v_ref_to_sync = 1, + .h_sync_width = 30, + .v_sync_width = 5, + .h_back_porch = 56, + .v_back_porch = 80, + .h_active = 1366, + .v_active = 768, + .h_front_porch = 64, + .v_front_porch = 125, + }, + { + /* 1366x768@48 */ + .pclk = 74180000, + .h_ref_to_sync = 1, + .v_ref_to_sync = 1, + .h_sync_width = 30, + .v_sync_width = 5, + .h_back_porch = 52, + .v_back_porch = 98, + .h_active = 1366, + .v_active = 768, + .h_front_porch = 64, + .v_front_porch = 152, + }, +}; + +static struct tegra_fb_data p1852_fb_data = { + .win = 0, + .xres = 1366, + .yres = 768, + .bits_per_pixel = 32, +}; + +#else + +/* Mode data for primary RGB/LVDS out */ static struct tegra_dc_mode p1852_panel_modes[] = { { /* 800x480@60 */ @@ -63,6 +120,8 @@ static struct tegra_fb_data p1852_fb_data = { .bits_per_pixel = 32, }; +#endif + static struct tegra_dc_out p1852_disp1_out = { .align = TEGRA_DC_ALIGN_MSB, .order = TEGRA_DC_ORDER_RED_BLUE, |