diff options
author | Ashwin Joshi <asjoshi@nvidia.com> | 2014-01-28 13:19:02 +0530 |
---|---|---|
committer | Sandeep Trasi <strasi@nvidia.com> | 2014-01-29 03:17:38 -0800 |
commit | 3556348ec6331ddad13bae18701184fa36a6d1ea (patch) | |
tree | 27ec233f3af541409b9d23b89e846bc079e2efd2 /arch/arm/mach-tegra/board-vcm30_t124-power.c | |
parent | 9726142c1894582c7f8384c50c551ef71e429f70 (diff) |
arm: tegra: vcm30t124: Remove CL DVFS registration
Currently CL DVFS is not used. Hence, remove its registration and
corresponding platform data.
Bug 1410210
Change-Id: I8a78bb596b3176a9dfada267ee8e0efa0a39b56b
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/360807
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Tested-by: Sandeep Trasi <strasi@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-vcm30_t124-power.c')
-rw-r--r-- | arch/arm/mach-tegra/board-vcm30_t124-power.c | 60 |
1 files changed, 1 insertions, 59 deletions
diff --git a/arch/arm/mach-tegra/board-vcm30_t124-power.c b/arch/arm/mach-tegra/board-vcm30_t124-power.c index 2873acf44e5b..3325b19400e4 100644 --- a/arch/arm/mach-tegra/board-vcm30_t124-power.c +++ b/arch/arm/mach-tegra/board-vcm30_t124-power.c @@ -1,7 +1,7 @@ /* * arch/arm/mach-tegra/board-vcm30_t124-power.c * - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -212,61 +212,6 @@ static struct i2c_board_info __initdata max15569_vddgpu_boardinfo[] = { }, }; -#ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS -/* board parameters for cpu dfll */ -static struct tegra_cl_dvfs_cfg_param vcm30_t124_cl_dvfs_param = { - .sample_rate = 12500, - - .force_mode = TEGRA_CL_DVFS_FORCE_FIXED, - .cf = 10, - .ci = 0, - .cg = 2, - - .droop_cut_value = 0xF, - .droop_restore_ramp = 0x0, - .scale_out_ramp = 0x0, -}; - -/* MAX15569: fixed 10mV steps from 600mV to 1400mV, with offset 0x0b */ -#define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 10000 + 1) -static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE]; -static inline void fill_reg_map(void) -{ - int i; - for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) { - pmu_cpu_vdd_map[i].reg_value = i + 0x0b; - pmu_cpu_vdd_map[i].reg_uV = 600000 + 10000 * i; - } -} - -static struct tegra_cl_dvfs_platform_data vcm30_t124_cl_dvfs_data = { - .dfll_clk_name = "dfll_cpu", - .pmu_if = TEGRA_CL_DVFS_PMU_I2C, - .u.pmu_i2c = { - .fs_rate = 400000, - .slave_addr = 0x3a, - .reg = 0x07, - }, - .vdd_map = pmu_cpu_vdd_map, - .vdd_map_size = PMU_CPU_VDD_MAP_SIZE, - - .cfg_param = &vcm30_t124_cl_dvfs_param, -}; - -static int __init vcm30_t124_cl_dvfs_init(void) -{ - fill_reg_map(); -#if 0 - if (tegra_revision < TEGRA_REVISION_A02) - vcm30_t124_cl_dvfs_data.out_quiet_then_disable = true; -#endif - tegra_cl_dvfs_device.dev.platform_data = &vcm30_t124_cl_dvfs_data; - platform_device_register(&tegra_cl_dvfs_device); - - return 0; -} -#endif - static int __init vcm30_t124_max77663_regulator_init(void) { void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); @@ -285,9 +230,6 @@ static int __init vcm30_t124_max77663_regulator_init(void) int __init vcm30_t124_regulator_init(void) { -#ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS - vcm30_t124_cl_dvfs_init(); -#endif vcm30_t124_max77663_regulator_init(); i2c_register_board_info(4, max15569_vddcpu_boardinfo, 1); i2c_register_board_info(4, max15569_vddgpu_boardinfo, 1); |