diff options
author | Gary King <gking@nvidia.com> | 2011-02-11 01:06:15 -0800 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:07 -0800 |
commit | 09d790bfef00b6b9a77376472d65fe61aba257b3 (patch) | |
tree | 2fafac90cb7ad564e89824ea94839109887d4afa /arch/arm/mach-tegra/board-ventana-power.c | |
parent | f62e6fa74bd193e9fa8f795613a2b3a29b6edf19 (diff) |
[ARM] tegra: ventana: add platform data support for LP0
Making default suspend mode as LP0 and adding platform data
for LP0.
For non-A03 ventana systems making LP1 as default suspend mode.
Original-Change-Id: If9d6c3c1b2a421bb257baa282183c74b0a03ab98
Reviewed-on: http://git-master/r/12079
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R2efdc05bd47ec7671c33d4bf225f469a6ba5e5db
Diffstat (limited to 'arch/arm/mach-tegra/board-ventana-power.c')
-rw-r--r-- | arch/arm/mach-tegra/board-ventana-power.c | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/board-ventana-power.c b/arch/arm/mach-tegra/board-ventana-power.c index 4328d74b856d..d43a83251d15 100644 --- a/arch/arm/mach-tegra/board-ventana-power.c +++ b/arch/arm/mach-tegra/board-ventana-power.c @@ -29,6 +29,7 @@ #include <mach/irqs.h> #include "gpio-names.h" +#include "fuse.h" #include "power.h" #include "wakeups-t2.h" #include "board.h" @@ -161,11 +162,15 @@ static struct i2c_board_info __initdata ventana_regulators[] = { }; static struct tegra_suspend_platform_data ventana_suspend_data = { + /* + * Check power on time and crystal oscillator start time + * for appropriate settings. + */ .cpu_timer = 2000, - .cpu_off_timer = 0, - .suspend_mode = TEGRA_SUSPEND_LP1, + .cpu_off_timer = 100, + .suspend_mode = TEGRA_SUSPEND_LP0, .core_timer = 0x7e7e, - .core_off_timer = 0, + .core_off_timer = 0xf, .separate_req = true, .corereq_high = false, .sysclkreq_high = true, @@ -178,7 +183,14 @@ static struct tegra_suspend_platform_data ventana_suspend_data = { int __init ventana_regulator_init(void) { void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); + void __iomem *chip_id = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804; u32 pmc_ctrl; + u32 minor; + + minor = (readl(chip_id) >> 16) & 0xf; + /* A03 (but not A03p) chips do not support LP0 */ + if (minor == 3 && !(tegra_spare_fuse(18) || tegra_spare_fuse(19))) + ventana_suspend_data.suspend_mode = TEGRA_SUSPEND_LP1; /* configure the power management controller to trigger PMU * interrupts when low */ |