diff options
| author | Jay Agarwal <jagarwal@nvidia.com> | 2012-05-18 12:16:28 +0530 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-05-30 00:11:53 -0700 |
| commit | 80b76730062873275081176219463225d0997bbf (patch) | |
| tree | df7514bc01824a8b223da863a8763903c66ffcaf /arch/arm/mach-tegra/board-whistler.c | |
| parent | aef1c84834f5228316d1e096434abf98ced90eb6 (diff) | |
arm: tegra: pcie: resolve flaw in lp0 save state
1. Restoring control register correctly.
2. Enabling clock clamping while resume
Bug 959642
Change-Id: Ic97306b4dfed0e131274aa93b35dba3f906e55be
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/103127
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'arch/arm/mach-tegra/board-whistler.c')
0 files changed, 0 insertions, 0 deletions