diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-12-17 22:54:55 -0800 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-01-12 09:18:26 -0800 |
| commit | 24dbfa062e79033e26cd58886b3ee2e7c22163cc (patch) | |
| tree | eedb857f52d8fd5fc02b372ce7705ffe9c43797a /arch/arm/mach-tegra/clock.h | |
| parent | 3929968b672725bd85d06f489659fa5eb6ae6d5a (diff) | |
ARM: tegra: clock: Split Tegra3 G/LP CPU backup rates
Separated Tegra3 G and LP CPU backup rates used while main CPU PLL is
re-locking. These rates are selected low enough to be safe at minimum
voltage, but high enough to avoid voltage droop when CPU clock is
switched between backup and main clock sources.
Bug 868692
Change-Id: I6b07323a5d3a69d0834b743596aca1e5499781a4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/71132
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Reviewed-on: http://git-master/r/74551
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
| -rw-r--r-- | arch/arm/mach-tegra/clock.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h index 25ba88bc4893..2bb0fa76a8c3 100644 --- a/arch/arm/mach-tegra/clock.h +++ b/arch/arm/mach-tegra/clock.h @@ -176,9 +176,13 @@ struct clk { struct { struct clk *main; struct clk *backup; + unsigned long backup_rate; enum cpu_mode mode; } cpu; struct { + u32 div71; + } cclk; + struct { struct clk *pclk; struct clk *hclk; struct clk *sclk_low; |