diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-04-07 23:55:52 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:42:37 -0800 |
| commit | ad5c0c01152874543f5d9c5c0ab77a1ab66f57c7 (patch) | |
| tree | 2b99ce110cc8e22df66c5aa9a433711c0f1d82bc /arch/arm/mach-tegra/clock.h | |
| parent | f628c14c12da489c09aa5ce3e7aa4f04fe38081b (diff) | |
ARM: tegra: clock: Limit Tegra3 fractional divisors usage
Per Tegra3 characterization results, do not use fractional ratios
for dividing host1x/3d/2d/epp/mpe/vi/vde/se clocks. Also prevent
using 1:1.5 ratio by system clock dividers (other fractional ratios
are still allowed for sclk). Change sclk rounding algorithm to round
up divider ladder, since sclk shared bus clock should honor maximum
shared user request.
Bug 803144
Original-Change-Id: I7b4bb1bb21a4ce4bbfb958c9a603a868dc3c05b4
Reviewed-on: http://git-master/r/29937
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Rebase-Id: R45798e4d3aff886959c52a9155c257db4c801eda
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
| -rw-r--r-- | arch/arm/mach-tegra/clock.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h index 1eeadf30f0c6..884a6823d327 100644 --- a/arch/arm/mach-tegra/clock.h +++ b/arch/arm/mach-tegra/clock.h @@ -51,6 +51,7 @@ #define DIV_U71_UART (1 << 18) #define MUX_CLK_OUT (1 << 19) #define PLLM (1 << 20) +#define DIV_U71_INT (1 << 21) #define ENABLE_ON_INIT (1 << 28) #ifndef __ASSEMBLY__ |