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authorAlex Frid <afrid@nvidia.com>2012-04-07 19:36:49 -0700
committerVarun Wadekar <vwadekar@nvidia.com>2012-06-27 10:41:23 +0530
commit808f425f8466bf87f07204ea8568b3107a04f457 (patch)
treea1b2a59ba4c01c6c1a49853bd90a81063fbfc00a /arch/arm/mach-tegra/clock.h
parent67439a2f4a05a8f284f5f615d30dc8dcc884cb63 (diff)
ARM: tegra11: dvfs: Re-factor CL-DVFS support
Since CL-DVFS module is now represented in Tegra11 clock framework as dynamic frequency lock loop (DFLL) clock source, and all CL_DVFS operations are protected by DFLL clock lock, moved the CL-DVFS object instance from tegra_cl_dvfs.c file to tegra11_clocks.c file, and updated all respective APIs accordingly. As a result tegra_cl_dvfs.c contains only chip independent APIs that can be shared between clock frameworks for different tegra architectures that support CL-DVFS. Change-Id: I8ae2d6fb8ef58ab1a41cca778742ba1ab0af78a1 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/95513 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r--arch/arm/mach-tegra/clock.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index dccc28c79362..f433f461ebdb 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -77,6 +77,8 @@ struct clk;
#define PERIPH_ON_APB (1 << 29)
#define PERIPH_ON_CBUS (1 << 30)
+struct tegra_cl_dvfs;
+
struct clk_mux_sel {
struct clk *input;
u32 value;
@@ -178,6 +180,9 @@ struct clk {
u32 misc1;
} pll;
struct {
+ struct tegra_cl_dvfs *cl_dvfs;
+ } dfll;
+ struct {
unsigned long default_rate;
} pll_div;
struct {