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authorLaxman Dewangan <ldewangan@nvidia.com>2011-05-28 11:28:10 +0530
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:42:45 -0800
commit31750a8147ac72efe65ecd6f36c56806a867bb40 (patch)
tree66522718c77cdb96e97f766b83c48b91aedd1387 /arch/arm/mach-tegra/clock.h
parentd9c4beb8b88f2934266bfdd5158a5b60203e1fa5 (diff)
arm: tegra: clock: Reading APB bus before disabling clock
It may be possible that write operation on apb bus does not get complete before disabling clock if the clock is disabled just after the write on apb bus. To have proper sequence of operation, it is require to read back the apb bus to make sure the write operation is completed. bug 830481 Original-Change-Id: I7f9f68f4cd6d39cf0bd697ddd236c4ce733dcf43 Reviewed-on: http://git-master/r/34413 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R204c12464faad2d3e36fbd1b583e798fab99e248
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r--arch/arm/mach-tegra/clock.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index c6c9ee432f00..f33818caecbe 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -53,6 +53,7 @@
#define PLLM (1 << 20)
#define DIV_U71_INT (1 << 21)
#define ENABLE_ON_INIT (1 << 28)
+#define PERIPH_ON_APB (1 << 29)
#ifndef __ASSEMBLY__