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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2013-01-24 15:27:07 +0100
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2013-01-24 15:27:07 +0100
commitb37acc053dd43475e67e2733a352c4f77e4f65c2 (patch)
tree6457cb6903033df1ccc7d025637b134cb6b14d5e /arch/arm/mach-tegra/clock.h
parentd49a5dea0456773992edf0fa3b2d4e46e0f1ef6c (diff)
tegra: apalis_t30: initial Toradex Apalis T30 L4T support
Tested on early prototype Apalis T30 V1.0a module. Known issues: - ADC not integrated yet. - HDA not integrated yet. - CEC not integrated yet. - IrDA not integrated yet. - Keys not integrated yet therefore no way to wake from suspend. - 8-bit MMC1 slot card detection interrupt not working despite detection GPIO successfully being tested with GPIOConfig. Note: even 8-bit cards work fine if already plugged-in during boot. - PCIe limited to internal Gigabit Ethernet chip for now due to our proprietary way of resetting other ports which requires further integration into NVIDIA's driver.
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r--arch/arm/mach-tegra/clock.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index 01841f32f4c4..703393ba7bd9 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -25,12 +25,12 @@
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
#define USE_PLL_LOCK_BITS 0 /* Never use lock bits on Tegra2 */
#else
-#ifdef CONFIG_MACH_COLIBRI_T30
+#if defined(CONFIG_MACH_APALIS_T30) || defined(CONFIG_MACH_COLIBRI_T30)
/* Hack: avoid lock-up during boot-up due to missing pll_a lock bit. */
-#define USE_PLL_LOCK_BITS 0 /* Never use lock bits on Colibri T30 */
-#else /* CONFIG_MACH_COLIBRI_T30 */
+#define USE_PLL_LOCK_BITS 0 /* Never use lock bits on Apalis/Colibri T30 */
+#else /* CONFIG_MACH_APALIS_T30 | CONFIG_MACH_COLIBRI_T30 */
#define USE_PLL_LOCK_BITS 1 /* Use lock bits for PLL stabilisation */
-#endif /* CONFIG_MACH_COLIBRI_T30 */
+#endif /* CONFIG_MACH_APALIS_T30 | CONFIG_MACH_COLIBRI_T30 */
#define USE_PLLE_SS 1 /* Use spread spectrum coefficients for PLLE */
#define PLL_POST_LOCK_DELAY 50 /* Safety delay after lock is detected */
#endif