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authorAlex Frid <afrid@nvidia.com>2013-01-18 21:09:09 -0800
committerMandar Padmawar <mpadmawar@nvidia.com>2013-01-27 23:51:09 -0800
commit558a32fde1dce6f34d379da0f33477b5992c1963 (patch)
tree028b5e410ef7249554a1e0ef99636b74eaa13326 /arch/arm/mach-tegra/clock.h
parent009d7eb3fa5945f4521a53eaa2234eba754eccaf (diff)
ARM: tegra: clock: Add common EMC interface header
Change-Id: I78538ad9a0061ba09bad5fb122ff672c93caef88 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/192625 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r--arch/arm/mach-tegra/clock.h11
1 files changed, 1 insertions, 10 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index e08d51442ae2..3c3d4b1f941c 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -6,7 +6,7 @@
* Author:
* Colin Cross <ccross@google.com>
*
- * Copyright (C) 2010-2012, NVIDIA Corporation.
+ * Copyright (C) 2010-2013, NVIDIA Corporation.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -280,20 +280,11 @@ int clk_set_parent_locked(struct clk *c, struct clk *parent);
long clk_round_rate_locked(struct clk *c, unsigned long rate);
int tegra_clk_shared_bus_update(struct clk *c);
void tegra3_set_cpu_skipper_delay(int delay);
-int tegra_emc_set_rate(unsigned long rate);
-long tegra_emc_round_rate(unsigned long rate);
-struct clk *tegra_emc_predict_parent(unsigned long rate, u32 *div_value);
-bool tegra_emc_is_parent_ready(unsigned long rate, struct clk **parent,
- unsigned long *parent_rate, unsigned long *backup_rate);
-void tegra_emc_timing_invalidate(void);
unsigned long tegra_clk_measure_input_freq(void);
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
-static inline int tegra_emc_backup(unsigned long rate)
-{ return 0; }
static inline bool tegra_clk_is_parent_allowed(struct clk *c, struct clk *p)
{ return true; }
#else
-int tegra_emc_backup(unsigned long rate);
bool tegra_clk_is_parent_allowed(struct clk *c, struct clk *p);
#endif