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author | Scott Williams <scwilliams@nvidia.com> | 2011-08-25 14:28:10 -0700 |
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committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:48:40 -0800 |
commit | b537870ed1880f7f52eec17e115727a53b58ed27 (patch) | |
tree | de879eac599b40523528899d865bc11bb089e944 /arch/arm/mach-tegra/common-t3.c | |
parent | b1a26f8631e7376d3b53f616c207c43d57ab1ef8 (diff) |
ARM: tegra: Fix warnings
Change-Id: Ic2cecccf0f4f6e6ca612af2ee07acdbca2ce07a5
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/49281
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Tested-by: Daniel Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R59e04e0a46099403284a036de7f35d21c6188d81
Diffstat (limited to 'arch/arm/mach-tegra/common-t3.c')
-rw-r--r-- | arch/arm/mach-tegra/common-t3.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/common-t3.c b/arch/arm/mach-tegra/common-t3.c index c4c7752d1f42..17a26c202c9b 100644 --- a/arch/arm/mach-tegra/common-t3.c +++ b/arch/arm/mach-tegra/common-t3.c @@ -185,10 +185,11 @@ out: return IRQ_HANDLED; } -void __init tegra_mc_init(void) +int __init tegra_mc_init(void) { void __iomem *mc = IO_ADDRESS(TEGRA_MC_BASE); u32 reg; + int ret = 0; reg = 0x0A7F1010; writel(reg, mc + MC_RESERVED_RSV); @@ -200,10 +201,13 @@ void __init tegra_mc_init(void) if (request_irq(INT_MC_GENERAL, tegra_mc_error_isr, 0, "mc_status", NULL)) { pr_err("%s: unable to register MC error interrupt\n", __func__); + ret = -ENXIO; } else { reg = MC_INT_DECERR_EMEM | MC_INT_SECURITY_VIOLATION | MC_INT_INVALID_SMMU_PAGE; writel(reg, mc + MC_INT_MASK); } + + return ret; } arch_initcall(tegra_mc_init); |