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authorAdeel Raza <araza@nvidia.com>2013-09-24 12:57:25 -0700
committerBo Yan <byan@nvidia.com>2013-12-12 16:44:29 -0800
commita1198f6aab0fe59b76ff2828e0015e38f554e485 (patch)
tree5210f8014dfcafa3895babf3c6fc139757620d5b /arch/arm/mach-tegra/common.c
parentb9a4eaeda9dbf8b3bedfb4565da707b1fc0c0dd1 (diff)
ARM: tegra: always enable RAM repair
Always enable RAM repair (irrespective of fuse bits) for non-Tegra11 platforms. Bug 1366617 Change-Id: I548934ca6fbe9e89b27cf99f8929b261fdbddb89 Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: http://git-master/r/335231 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/common.c')
-rw-r--r--arch/arm/mach-tegra/common.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index a1c2be893c32..e8c3f88b2e58 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -733,12 +733,16 @@ static void __init tegra_perf_init(void)
#if !defined(CONFIG_ARCH_TEGRA_2x_SOC) && !defined(CONFIG_ARCH_TEGRA_3x_SOC)
static void __init tegra_ramrepair_init(void)
{
+#if defined(CONFIG_ARCH_TEGRA_11x_SOC)
if (tegra_spare_fuse(10) | tegra_spare_fuse(11)) {
+#endif
u32 reg;
reg = readl(FLOW_CTRL_RAM_REPAIR);
reg &= ~FLOW_CTRL_RAM_REPAIR_BYPASS_EN;
writel(reg, FLOW_CTRL_RAM_REPAIR);
+#if defined(CONFIG_ARCH_TEGRA_11x_SOC)
}
+#endif
}
#endif