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authorGary King <gking@nvidia.com>2010-04-07 10:31:54 -0700
committerGary King <gking@nvidia.com>2010-04-08 20:07:38 -0700
commite7f3cf8b374c86cd12872f443c43ed8248692300 (patch)
treec00459cb94b4b66dcaf2df27af2cf88e6e583bee /arch/arm/mach-tegra/common.c
parent76e5fe38038b4bcaa994a4d4f0b36c6e3738a8bb (diff)
[ARM] tegra: implement tegra-specific arm_pm_restart
tegra systems must ensure that all slave CPUs are in reset and that the L1 and L2 caches are flushed prior to triggering the system reset. Change-Id: Iddc99dfd814778492b232f209ab37e14f25ab805
Diffstat (limited to 'arch/arm/mach-tegra/common.c')
-rw-r--r--arch/arm/mach-tegra/common.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 838bb5d8266c..80379c10788e 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -21,11 +21,23 @@
#include <linux/io.h>
#include <asm/hardware/cache-l2x0.h>
+#include <asm/cacheflush.h>
+#include <asm/outercache.h>
#include <mach/iomap.h>
#include "board.h"
+extern int disable_nonboot_cpus(void);
+
+static void tegra_machine_restart(char mode, const char *cmd)
+{
+ disable_nonboot_cpus();
+ flush_cache_all();
+ outer_shutdown();
+ arm_machine_restart(mode, cmd);
+}
+
void __init tegra_init_cache(void)
{
#ifdef CONFIG_CACHE_L2X0
@@ -42,4 +54,5 @@ void __init tegra_common_init(void)
{
tegra_init_clock();
tegra_init_cache();
+ arm_pm_restart = tegra_machine_restart;
}