diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-05 18:05:26 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:54 -0800 |
| commit | 27a435eb62ef122692e904cbd2959ac191bc43cc (patch) | |
| tree | c9bb6481c999823028e5fde632c184aeefb96f15 /arch/arm/mach-tegra/cpuidle-t2.c | |
| parent | 935cf35887d167f8cac58b72d8998a5d6712b27e (diff) | |
ARM: tegra: Redesign Tegra CPU reset handling
- Add a single unified handler for all CPU resets that is copied to
IRAM.
- Add state information to direct the flow of execution through the
reset handler based on the reason a CPU was reset.
- Write the EVP CPU reset vector only once per cold/warm boot session.
- Prevent modification of the EVP CPU reset vector in Tegra3.
Bug 786290
Bug 790458
Change-Id: Ica6707f3514986ee914e73a2d9766a4e06ce2d29
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
DW: Split into logical changes
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R7b9859a83717e76c3c083bdde724bd5fef9ce089
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle-t2.c')
| -rw-r--r-- | arch/arm/mach-tegra/cpuidle-t2.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/cpuidle-t2.c b/arch/arm/mach-tegra/cpuidle-t2.c index d2baba095ca2..326d4e8ec215 100644 --- a/arch/arm/mach-tegra/cpuidle-t2.c +++ b/arch/arm/mach-tegra/cpuidle-t2.c @@ -70,7 +70,6 @@ static inline unsigned int time_to_bin(unsigned int time) #ifdef CONFIG_SMP static void __iomem *clk_rst = IO_ADDRESS(TEGRA_CLK_RESET_BASE); -static void __iomem *evp_reset = IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100; static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); static s64 tegra_cpu1_idle_time = LLONG_MAX; @@ -95,8 +94,6 @@ static void tegra2_wake_reset_cpu(int cpu) { u32 reg; - writel(virt_to_phys(tegra_secondary_resume), evp_reset); - /* enable cpu clock on cpu */ reg = readl(clk_rst + 0x4c); writel(reg & ~(1 << (8 + cpu)), clk_rst + 0x4c); |