diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-01-30 13:42:05 -0800 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-02-03 06:17:59 -0800 |
| commit | 98e66926adcf7af88c87f467a11fba35c143f663 (patch) | |
| tree | 16fa23ae25a97a8b557d31048b38a53ad068f292 /arch/arm/mach-tegra/cpuidle.c | |
| parent | 3563d218e037805c363771df34adc3b8c666e8c1 (diff) | |
ARM: tegra: power: Separate lp2 latency for G/LP CPU modes
Do not use common lp2 exit latency for Tegra3 CPU G and CPU LP modes.
Separately measure and adjust latency in each mode; restart calculation
after mode switch from the last measured latency in the target mode.
Reviewed-on: http://git-master/r/78344
Change-Id: I54803c6abf4107a578aa1fed8feaa4a419a9c07f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78902
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle.c')
| -rw-r--r-- | arch/arm/mach-tegra/cpuidle.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index f8a274b5f313..47d5996e5961 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -97,6 +97,14 @@ void tegra_lp2_in_idle(bool enable) } } +void tegra_lp2_update_target_residency(struct cpuidle_state *state) +{ + state->target_residency = state->exit_latency + + tegra_lp2_power_off_time; + if (state->target_residency < tegra_lp2_min_residency) + state->target_residency = tegra_lp2_min_residency; +} + static int tegra_idle_enter_lp2(struct cpuidle_device *dev, struct cpuidle_state *state) { @@ -127,11 +135,8 @@ static int tegra_idle_enter_lp2(struct cpuidle_device *dev, /* Update LP2 latency provided no fall back to LP3 */ if (state == dev->last_state) { - state->exit_latency = tegra_lp2_exit_latency; - state->target_residency = tegra_lp2_exit_latency + - tegra_lp2_power_off_time; - if (state->target_residency < tegra_lp2_min_residency) - state->target_residency = tegra_lp2_min_residency; + tegra_lp2_set_global_latency(state); + tegra_lp2_update_target_residency(state); } tegra_cpu_idle_stats_lp2_time(dev->cpu, us); |