diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2013-10-11 12:43:03 +0530 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2013-10-16 01:44:58 -0700 |
| commit | 459d61d7fc74baf77408f892a2e14f5457d1a04a (patch) | |
| tree | 6a5d58f9bc557015533dfdbeb10f79ff00474e65 /arch/arm/mach-tegra/devices.c | |
| parent | 2b81ea80d7a4f144977592349ac36e5c54f659cf (diff) | |
arm: tegra: support for FIQ debugger with secure OS
Most of the set up for the debugger is done by the secure
OS, but the kernel setup that needs to be done is done here.
Use the following config options to enable the debugger -
CONFIG_FIQ=y
CONFIG_TEGRA_FIQ_DEBUGGER=y
CONFIG_FIQ_GLUE=y
CONFIG_FIQ_DEBUGGER=y
CONFIG_FIQ_DEBUGGER_CONSOLE=y
CONFIG_TEGRA_WATCHDOG=y
CONFIG_TEGRA_WATCHDOG_ENABLE_ON_PROBE=y
Bug 1326082
Original-author: Hyung Taek Ryoo <hryoo@nvidia.com>
Change-Id: If1a5dd4f158530dea6c0455ead74a8eeaa226163
Reviewed-on: http://git-master/r/#/c/261217
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/289165
Diffstat (limited to 'arch/arm/mach-tegra/devices.c')
| -rw-r--r-- | arch/arm/mach-tegra/devices.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c index 35f5793d29ee..bc2cee0800e0 100644 --- a/arch/arm/mach-tegra/devices.c +++ b/arch/arm/mach-tegra/devices.c @@ -2424,6 +2424,11 @@ static struct resource tegra_wdt_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { + .start = TEGRA_PMC_BASE, + .end = TEGRA_PMC_BASE + TEGRA_PMC_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [3] = { .start = INT_TMR1, .end = INT_TMR1, .flags = IORESOURCE_IRQ, @@ -2449,18 +2454,36 @@ static struct resource tegra_wdt0_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { + .start = TEGRA_PMC_BASE, + .end = TEGRA_PMC_BASE + TEGRA_PMC_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [3] = { .start = INT_WDT_CPU, .end = INT_WDT_CPU, .flags = IORESOURCE_IRQ, }, #ifdef CONFIG_TEGRA_FIQ_DEBUGGER - [3] = { + [4] = { .start = TEGRA_QUATERNARY_ICTLR_BASE, .end = TEGRA_QUATERNARY_ICTLR_BASE + \ TEGRA_QUATERNARY_ICTLR_SIZE -1, .flags = IORESOURCE_MEM, }, #endif +#if defined(CONFIG_TEGRA_USE_SECURE_KERNEL) && \ + defined(CONFIG_ARCH_TEGRA_12x_SOC) && defined(CONFIG_FIQ_DEBUGGER) + [5] = { + .start = TEGRA_WDT4_BASE, + .end = TEGRA_WDT4_BASE + TEGRA_WDT4_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [6] = { + .start = INT_WDT_AVP, + .end = INT_WDT_AVP, + .flags = IORESOURCE_IRQ, + }, +#endif }; struct platform_device tegra_wdt0_device = { |