diff options
author | Iliyan Malchev <malchev@google.com> | 2010-10-21 16:48:37 -0700 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:36:33 -0800 |
commit | 0486ddf0a307085d24828cd2328bf5d781ea60f7 (patch) | |
tree | 3bbe9d1054bb31634cb303403876ce43839f20ac /arch/arm/mach-tegra/dma.c | |
parent | cf943159066f7f0e276d72c39f6cd8daf2300ed6 (diff) |
[ARM] tegra: dma: expose TEGRA_DMA_MAX_TRANSFER_SIZE, fix typo
NV_DMA_MAX_TRASFER_SIZE --> TEGRA_DMA_MAX_TRANSFER_SIZE
Signed-off-by: Iliyan Malchev <malchev@google.com>
Diffstat (limited to 'arch/arm/mach-tegra/dma.c')
-rw-r--r-- | arch/arm/mach-tegra/dma.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index 57727712da87..c2b31452a5e7 100644 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -102,8 +102,6 @@ #define TEGRA_SYSTEM_DMA_CH_MAX \ (TEGRA_SYSTEM_DMA_CH_NR - TEGRA_SYSTEM_DMA_AVP_CH_NUM - 1) -#define NV_DMA_MAX_TRASFER_SIZE 0x10000 - const unsigned int ahb_addr_wrap_table[8] = { 0, 32, 64, 128, 256, 512, 1024, 2048 }; @@ -329,7 +327,7 @@ int tegra_dma_enqueue_req(struct tegra_dma_channel *ch, struct tegra_dma_req *_req; int start_dma = 0; - if (req->size > NV_DMA_MAX_TRASFER_SIZE || + if (req->size > TEGRA_DMA_MAX_TRANSFER_SIZE || req->source_addr & 0x3 || req->dest_addr & 0x3) { pr_err("Invalid DMA request for channel %d\n", ch->id); return -EINVAL; |