arm: tegra: edp: refactor Tegra3x CPU EDP params

Move tegra3x CPU EDP params routine to its own file.

Bug 1274041

Change-Id: Id41eeeccb11a61f2d463f91f2b0fb72567cc3eea
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/233911
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

1 files changed, 24 insertions, 287 deletions

diff --git a/arch/arm/mach-tegra/edp.c b/arch/arm/mach-tegra/edp.c
index eec417a03d0c..2a25b66d687c 100644
--- a/arch/arm/mach-tegra/edp.c
+++ b/arch/arm/mach-tegra/edp.c
@@ -47,280 +47,6 @@ static struct tegra_system_edp_entry *power_edp_limits;
 static int power_edp_limits_size;
 
 /*
- * Temperature step size cannot be less than 4C because of hysteresis
- * delta
- * Code assumes different temperatures for the same speedo_id /
- * regulator_cur are adjacent in the table, and higest regulator_cur
- * comes first
- */
-static char __initdata tegra_edp_vdd_cpu_map[] = {
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-	0x0c, 0x32, 0x17, 0xa5, 0x9b, 0x91, 0x87, 0x0c,
-	0x32, 0x2d, 0xaa, 0xa0, 0x96, 0x8c, 0x0c, 0x32,
-	0x3c, 0xaa, 0xa0, 0x96, 0x82, 0x0c, 0x32, 0x46,
-	0xaa, 0xa0, 0x8c, 0x78, 0x0c, 0x32, 0x4b, 0x8c,
-	0x82, 0x82, 0x78, 0x0c, 0x32, 0x55, 0x8c, 0x82,
-	0x82, 0x6e, 0x0c, 0x28, 0x17, 0xa5, 0x9b, 0x87,
-	0x73, 0x0c, 0x28, 0x2d, 0xaa, 0xa0, 0x8c, 0x78,
-	0x0c, 0x28, 0x3c, 0xaa, 0x96, 0x82, 0x73, 0x0c,
-	0x28, 0x46, 0xaa, 0x96, 0x78, 0x69, 0x0c, 0x28,
-	0x4b, 0x8c, 0x82, 0x78, 0x69, 0x0c, 0x28, 0x55,
-	0x8c, 0x82, 0x6e, 0x5a, 0x0c, 0x23, 0x17, 0xa5,
-	0x91, 0x7d, 0x69, 0x0c, 0x23, 0x2d, 0xaa, 0x96,
-	0x82, 0x6e, 0x0c, 0x23, 0x3c, 0xaa, 0x96, 0x78,
-	0x69, 0x0c, 0x23, 0x46, 0xaa, 0x8c, 0x6e, 0x5a,
-	0x0c, 0x23, 0x4b, 0x8c, 0x82, 0x6e, 0x5a, 0x0c,
-	0x23, 0x55, 0x8c, 0x82, 0x64, 0x50, 0x0d, 0x64,
-	0x17, 0xa5, 0x9b, 0x9b, 0x9b, 0x0d, 0x64, 0x2d,
-	0xaa, 0xa0, 0xa0, 0xa0, 0x0d, 0x64, 0x3c, 0xaa,
-	0xa0, 0xa0, 0xa0, 0x0d, 0x64, 0x46, 0xaa, 0xa0,
-	0xa0, 0xa0, 0x0d, 0x64, 0x4b, 0x8c, 0x82, 0x82,
-	0x82, 0x0d, 0x64, 0x55, 0x8c, 0x82, 0x82, 0x82,
-	0x0d, 0x50, 0x17, 0xa5, 0x9b, 0x9b, 0x9b, 0x0d,
-	0x50, 0x2d, 0xaa, 0xa0, 0xa0, 0xa0, 0x0d, 0x50,
-	0x3c, 0xaa, 0xa0, 0xa0, 0x96, 0x0d, 0x50, 0x46,
-	0xaa, 0xa0, 0xa0, 0x96, 0x0d, 0x50, 0x4b, 0x8c,
-	0x82, 0x82, 0x82, 0x0d, 0x50, 0x55, 0x8c, 0x82,
-	0x82, 0x82, 0x0d, 0x3c, 0x17, 0xa5, 0x9b, 0x9b,
-	0x87, 0x0d, 0x3c, 0x2d, 0xaa, 0xa0, 0xa0, 0x8c,
-	0x0d, 0x3c, 0x3c, 0xaa, 0xa0, 0x96, 0x82, 0x0d,
-	0x3c, 0x46, 0xaa, 0xa0, 0x96, 0x78, 0x0d, 0x3c,
-	0x4b, 0x8c, 0x82, 0x82, 0x78, 0x0d, 0x3c, 0x55,
-	0x8c, 0x82, 0x82, 0x6e, 0x0d, 0x28, 0x17, 0xa5,
-	0x91, 0x7d, 0x69, 0x0d, 0x28, 0x2d, 0xaa, 0x96,
-	0x82, 0x6e, 0x0d, 0x28, 0x3c, 0xaa, 0x96, 0x78,
-	0x64, 0x0d, 0x28, 0x46, 0xaa, 0x8c, 0x6e, 0x5a,
-	0x0d, 0x28, 0x4b, 0x8c, 0x82, 0x6e, 0x5a, 0x0d,
-	0x28, 0x55, 0x8c, 0x82, 0x64, 0x50,
-};
-
-
-static struct tegra_system_edp_entry __initdata tegra_system_edp_map[] = {
-
-/* {SKU, power-limit (in 100mW), {freq limits (in 10Mhz)} } */
-
-	{  1,  49, {130, 120, 120, 120} },
-	{  1,  44, {130, 120, 120, 110} },
-	{  1,  37, {130, 120, 110, 100} },
-	{  1,  35, {130, 120, 110,  90} },
-	{  1,  29, {130, 120, 100,  80} },
-	{  1,  27, {130, 120,  90,  80} },
-	{  1,  25, {130, 110,  80,  60} },
-	{  1,  21, {130, 100,  80,  40} },
-
-	{  4,  49, {130, 120, 120, 120} },
-	{  4,  44, {130, 120, 120, 110} },
-	{  4,  37, {130, 120, 110, 100} },
-	{  4,  35, {130, 120, 110,  90} },
-	{  4,  29, {130, 120, 100,  80} },
-	{  4,  27, {130, 120,  90,  80} },
-	{  4,  25, {130, 110,  80,  60} },
-	{  4,  21, {130, 100,  80,  40} },
-};
-
-/*
  * "Safe entry" to be used when no match for speedo_id /
  * regulator_cur is found; must be the last one
  */
@@ -684,12 +410,13 @@ static int __init init_cpu_edp_limits_lookup(void)
 	int i, j;
 	struct tegra_edp_limits *e;
 	struct tegra_edp_vdd_cpu_entry *t;
-	int tsize;
+	int tsize = 0;
 	int cpu_speedo_id = tegra_cpu_speedo_id();
 
-	t = (struct tegra_edp_vdd_cpu_entry *)tegra_edp_vdd_cpu_map;
-	tsize = sizeof(tegra_edp_vdd_cpu_map)
-		/ sizeof(struct tegra_edp_vdd_cpu_entry);
+	if (tegra_chip_id != TEGRA_CHIPID_TEGRA3)
+		return -EINVAL;
+
+	t = tegra3x_get_vdd_cpu_map(&tsize);
 
 	for (i = 0; i < tsize; i++) {
 		if (t[i].speedo_id == cpu_speedo_id &&
@@ -769,13 +496,26 @@ void __init tegra_init_cpu_edp_limits(unsigned int regulator_mA)
 	power_edp_limits_size = ARRAY_SIZE(power_edp_default_limits);
 }
 
+void tegra_get_cpu_edp_limits(const struct tegra_edp_limits **limits, int *size)
+{
+	*limits = edp_limits;
+	*size = edp_limits_size;
+}
+
 void __init tegra_init_system_edp_limits(unsigned int power_limit_mW)
 {
 	int cpu_speedo_id = tegra_cpu_speedo_id();
 	int i;
 	unsigned int *e;
-	struct tegra_system_edp_entry *t = tegra_system_edp_map;
-	int tsize = ARRAY_SIZE(tegra_system_edp_map);
+	struct tegra_system_edp_entry *t;
+	int tsize = 0;
+
+	if (tegra_chip_id != TEGRA_CHIPID_TEGRA3) {
+		e = NULL;
+		goto out;
+	}
+
+	t = tegra3x_get_system_edp_map(&tsize);
 
 	if (!power_limit_mW) {
 		e = NULL;
@@ -814,13 +554,6 @@ out:
 	system_edp_limits = e;
 }
 
-
-void tegra_get_cpu_edp_limits(const struct tegra_edp_limits **limits, int *size)
-{
-	*limits = edp_limits;
-	*size = edp_limits_size;
-}
-
 void tegra_get_system_edp_limits(const unsigned int **limits)
 {
 	*limits = system_edp_limits;
@@ -937,6 +670,10 @@ static int edp_reg_override_write(struct file *file,
 	unsigned int edp_reg_override_mA_temp;
 	unsigned int edp_reg_override_mA_prev = edp_reg_override_mA;
 
+	if (!(tegra_chip_id == TEGRA_CHIPID_TEGRA11 ||
+		tegra_chip_id == TEGRA_CHIPID_TEGRA14))
+		goto override_err;
+
 	if (sizeof(buf) <= count)
 		goto override_err;