diff options
| author | Colin Cross <ccross@android.com> | 2011-04-08 19:16:02 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:37:05 -0800 |
| commit | 71f81b4accbadae232e9e00916f5144bb3b76969 (patch) | |
| tree | c09fabb9abe6480f1a17cda49f42047bfceb080e /arch/arm/mach-tegra/fiq.c | |
| parent | 3450ab3b6df41c1dfb9568dfd6464d3c71341b9b (diff) | |
ARM: tegra: fiq: Fix calls to mask/unmask
Change-Id: I5ea0964d4a803ca7a52acd3d93307ca5254da6a9
Diffstat (limited to 'arch/arm/mach-tegra/fiq.c')
| -rw-r--r-- | arch/arm/mach-tegra/fiq.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/fiq.c b/arch/arm/mach-tegra/fiq.c index bc1e9c294114..19f9c059d100 100644 --- a/arch/arm/mach-tegra/fiq.c +++ b/arch/arm/mach-tegra/fiq.c @@ -49,7 +49,7 @@ static void tegra_legacy_select_fiq(unsigned int irq, bool fiq) void __iomem *base; pr_debug("%s: %d\n", __func__, irq); - irq -= 32; + irq -= FIRST_LEGACY_IRQ; base = ictlr_reg_base[irq>>5]; writel(fiq << (irq & 31), base + ICTLR_CPU_IEP_CLASS); } @@ -89,11 +89,11 @@ void tegra_fiq_enable(int irq) val |= 2; /* enableNS */ writel(val, base + GIC_CPU_CTRL); tegra_legacy_select_fiq(irq, true); - tegra_fiq_unmask(irq); + tegra_fiq_unmask(irq_get_irq_data(irq)); } void tegra_fiq_disable(int irq) { - tegra_fiq_mask(irq); + tegra_fiq_mask(irq_get_irq_data(irq)); tegra_legacy_select_fiq(irq, false); } |