diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-27 21:02:36 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:59 -0800 |
| commit | 111021ac897ab0f8256201de00b1e6ad6b8f0dd1 (patch) | |
| tree | 9c640f9164e19c8b65a3a86da13deb23935db220 /arch/arm/mach-tegra/headsmp.S | |
| parent | 35aaba062bfb1b910f6fa7088fea7274930d03db (diff) | |
ARM: tegra: power: Fix Tegra2 LP2 mode
All CPUs are not created equal. CPU0 must be the one to perform
the CPU complex suspend actions. CPU complex power gating and rail
gating cannot be triggered from CPU1. The Linux 2.6.39 port for
Tegra2 violates this hardware restriction. While it may have
appeared that the system was entering LP2 state, when entered
on CPU1, essentially all that happened was a WFI with no CPU
complex power gating and no CPU rail gating.
Change-Id: Ie754520264fe8de1b95f523d6575914bf77e747f
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R66e19457bc55bcd84124e3a4e23beae7b4ee707c
Diffstat (limited to 'arch/arm/mach-tegra/headsmp.S')
| -rw-r--r-- | arch/arm/mach-tegra/headsmp.S | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S index 5931b7fdc3a8..1c7c8fed7f1c 100644 --- a/arch/arm/mach-tegra/headsmp.S +++ b/arch/arm/mach-tegra/headsmp.S @@ -202,11 +202,6 @@ __is_not_lp1: ldr r9, [r12, #RESET_DATA(MASK_LP2)] tst r9, r11 @ if in_lp2 beq __is_not_lp2 -#if defined(CONFIG_SMP) && defined(CONFIG_ARCH_TEGRA_2x_SOC) - /* Tegra2 CPU1 LP2 wakeup uses the secondary startup handler */ - cmp r10, #1 - bne __is_not_lp2 -#endif ldr lr, [r12, #RESET_DATA(STARTUP_LP2)] cmp lr, #0 bleq __die @ no LP2 startup handler |