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| author | Stephen Warren <swarren@nvidia.com> | 2012-09-19 12:02:31 -0600 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-11-16 12:22:16 -0700 |
| commit | 2f2b7fb202a2fa93702a79d36033e5c8bee0120d (patch) | |
| tree | 22d29b27f152fc0b9a87f1d80ff57dcbaa65b59d /arch/arm/mach-tegra/headsmp.S | |
| parent | 9a2ab3f1fa01a146a395197153af0ae586e6a682 (diff) | |
ARM: tegra: define DT bindings for and instantiate timer
The Tegra timer provides a number of 29-bit timer channels, a single
32-bit free running counter, and in the Tegra30 variant, 5 watchdog modules.
The first two channels may also trigger a legacy watchdog reset.
Define a DT binding for this HW module, and add the module into the Tegra
device tree files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/headsmp.S')
0 files changed, 0 insertions, 0 deletions