diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-08-04 13:32:10 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:02 -0800 |
| commit | f312f55cb9bd593591432db3d4a5c1677b419a39 (patch) | |
| tree | 0d21c5fde7a594c07bd7293f51e81654dceee440 /arch/arm/mach-tegra/headsmp.S | |
| parent | 20e0db1694cafa07e5451b5416819da3ead119fe (diff) | |
ARM: tegra: power: Save CPU context to non-cacheable stack
The standard cpu_suspend does not work if there is an exernal
L2 cache in the system individual CPUs are suspending without
shutting down the whole CPU complex. As a workaround for this
problem, we must save the CPU context to a non-cacheable region
of memory.
Change-Id: I2fffbc77ed4f17fe9710307aaacda80836bacee8
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R7328c032c2a13775aa09432e119ea845ded85930
Diffstat (limited to 'arch/arm/mach-tegra/headsmp.S')
| -rw-r--r-- | arch/arm/mach-tegra/headsmp.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S index 1c7c8fed7f1c..caf38171f03e 100644 --- a/arch/arm/mach-tegra/headsmp.S +++ b/arch/arm/mach-tegra/headsmp.S @@ -68,7 +68,7 @@ ENTRY(tegra_resume) cpu_id r0 cmp r0, #0 @ CPU0? - bne cpu_resume @ no + bne tegra_cpu_resume_phys @ no #ifndef CONFIG_ARCH_TEGRA_2x_SOC @ Clear the flow controller flags for this CPU. @@ -86,7 +86,7 @@ ENTRY(tegra_resume) orr r1, r1, #1 str r1, [r0] - b cpu_resume + b tegra_cpu_resume_phys ENDPROC(tegra_resume) #endif |