diff options
| author | Gary King <gking@nvidia.com> | 2010-01-07 20:38:34 -0800 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-01-08 20:20:13 -0800 |
| commit | 5970e4c5c9f56836e74d4fd12c5c0746a4faa40c (patch) | |
| tree | 11aee6624f58359df2445751adb0fce0cf9ac98f /arch/arm/mach-tegra/include/mach | |
| parent | 277f0cdec01d89637fa9f20dd7522ef504222fd7 (diff) | |
tegra DMA: improve integration of system DMA driver with RM DMA
add a function to the RM DMA code to return the number of unreserved
(RM DMA-managed) APB DMA channels, and use that as the starting offset
for system DMA driver managed channels
reserve 2 DMA channels for each high-speed (native driver) uart
Change-Id: Ib078f7ba32b887bc06d9f04219a30594c56435a5
Diffstat (limited to 'arch/arm/mach-tegra/include/mach')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/nvrm_linux.h | 35 |
1 files changed, 23 insertions, 12 deletions
diff --git a/arch/arm/mach-tegra/include/mach/nvrm_linux.h b/arch/arm/mach-tegra/include/mach/nvrm_linux.h index efb9375dc521..035de018f01d 100644 --- a/arch/arm/mach-tegra/include/mach/nvrm_linux.h +++ b/arch/arm/mach-tegra/include/mach/nvrm_linux.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008-2009 NVIDIA Corporation. + * Copyright (c) 2008-2010 NVIDIA Corporation. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -56,20 +56,31 @@ extern NvRmDeviceHandle s_hRmGlobal; extern NvRmGpioHandle s_hGpioGlobal; -int tegra_get_partition_info_by_name( - const char *PartName, - NvU64 *pSectorStart, - NvU64 *pSectorLength, - NvU32 *pSectorSize); +int tegra_get_partition_info_by_name(const char *PartName, + NvU64 *pSectorStart, NvU64 *pSectorLength, NvU32 *pSectorSize); -int tegra_get_partition_info_by_num( - int PartitionNum, - char **pName, - NvU64 *pSectorStart, - NvU64 *pSectorEnd, - NvU32 *pSectorSize); +int tegra_get_partition_info_by_num(int PartitionNum, char **pName, + NvU64 *pSectorStart, NvU64 *pSectorEnd, NvU32 *pSectorSize); int tegra_was_boot_device(const char *pBootDev); +NvU32 NvRmDmaUnreservedChannels(void); + +#ifndef CONFIG_SERIAL_TEGRA_UARTS +#define TEGRA_SYSTEM_DMA_CH_UART 0 +#else +#define TEGRA_SYSTEM_DMA_CH_UART (2*CONFIG_SERIAL_TEGRA_UARTS) +#endif + +#ifdef CONFIG_TEGRA_SYSTEM_DMA +#define TEGRA_SYSTEM_DMA_CH_NUM (1 + TEGRA_SYSTEM_DMA_CH_UART) +#else +#define TEGRA_SYSTEM_DMA_CH_NUM (0) +#endif + +/* DMA channels available to system DMA driver */ +#define TEGRA_SYSTEM_DMA_CH_MIN NvRmDmaUnreservedChannels() +#define TEGRA_SYSTEM_DMA_CH_MAX \ + (TEGRA_SYSTEM_DMA_CH_MIN+TEGRA_SYSTEM_DMA_CH_NUM) #endif |