diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-05-20 17:33:06 -0700 |
|---|---|---|
| committer | Niket Sirsi <nsirsi@nvidia.com> | 2011-05-27 16:03:09 -0700 |
| commit | 7f3ace1aa6f98c95081478a52b56e7f1008ed114 (patch) | |
| tree | 159d795e389e6505d18b5dcf5123e086024554e2 /arch/arm/mach-tegra/include | |
| parent | 87f319f8915ff4bc6b17ac7ddeb3b1bb0edc34d9 (diff) | |
ARM: tegra: clocks: Completely remove DVFS for FPGA platforms
Dynamic Voltage & Frequency Scaling (DVFS) is not possible on
FPGA platforms. Completely remove the DVFS code from the image
on FPGA platforms to reduce the image size.
Change-Id: I4f1a8587f01e775000f48fbca7c85d75acee9c74
Reviewed-on: http://git-master/r/32466
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/include')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/clk.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h index d7ae8a0b1f05..0ca1a8924e21 100644 --- a/arch/arm/mach-tegra/include/mach/clk.h +++ b/arch/arm/mach-tegra/include/mach/clk.h @@ -37,7 +37,12 @@ enum tegra_clk_ex_param { void tegra_periph_reset_deassert(struct clk *c); void tegra_periph_reset_assert(struct clk *c); +#ifndef CONFIG_TEGRA_FPGA_PLATFORM int tegra_dvfs_set_rate(struct clk *c, unsigned long rate); +#else +static inline int tegra_dvfs_set_rate(struct clk *c, unsigned long rate) +{ return 0; } +#endif unsigned long clk_get_rate_all_locked(struct clk *c); #ifdef CONFIG_ARCH_TEGRA_2x_SOC void tegra_sdmmc_tap_delay(struct clk *c, int delay); |