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authorrhsieh <rhsieh@nvidia.com>2010-06-28 10:25:03 -0400
committerAntti Hatala <ahatala@nvidia.com>2010-06-29 04:10:01 -0700
commit7ddeb18acc426474d4f5447eb45ca7f29671aa55 (patch)
tree432313599f9b69ad9f5ada9a7c56e5f021265649 /arch/arm/mach-tegra/include
parentd563271ec962dcb8ef677c45ff63e6c016cdb25a (diff)
tegra: [RTC Alarm Clock] Implement TI pmu tps6586x by PMIC (pwr_int) pin
Integrate PMU RTC alarm function from K29 to K32. Bug 701881 Change-Id: Iee137be5a2e9a369611037da4c39b9f443ce8979 Reviewed-on: http://git-master/r/3265 Reviewed-by: Ching Kuang (Roger) Hsieh <rhsieh@nvidia.com> Tested-by: Ching Kuang (Roger) Hsieh <rhsieh@nvidia.com> Reviewed-by: Wilson Chen <wichen@nvidia.com> Reviewed-by: Antti Hatala <ahatala@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/include')
-rw-r--r--arch/arm/mach-tegra/include/nvodm_pmu.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/nvodm_pmu.h b/arch/arm/mach-tegra/include/nvodm_pmu.h
index 2b768edbe5b4..b20f536ebb82 100644
--- a/arch/arm/mach-tegra/include/nvodm_pmu.h
+++ b/arch/arm/mach-tegra/include/nvodm_pmu.h
@@ -449,6 +449,30 @@ NvOdmPmuWriteRtc(
NvU32 Count);
/**
+ * Gets the alarm count in seconds of the current external RTC (in PMU).
+ *
+ * @param hDevice A handle to the PMU.
+ * @param Count A pointer to where to return the current counter in sec.
+ * @return NV_TRUE if successful, or NV_FALSE otherwise.
+ */
+NvBool
+NvOdmPmuReadAlarm(
+ NvOdmPmuDeviceHandle hDevice,
+ NvU32* Count);
+
+/**
+ * Updates alarm count value.
+ *
+ * @param hDevice A handle to the PMU.
+ * @param Count data with which to update the current counter in sec.
+ * @return NV_TRUE if successful, or NV_FALSE otherwise.
+ */
+NvBool
+NvOdmPmuWriteAlarm(
+ NvOdmPmuDeviceHandle hDevice,
+ NvU32 Count);
+
+/**
* Returns whether or not the RTC is initialized.
*
* @param hDevice A handle to the PMU.