diff options
| author | Gary King <gking@nvidia.com> | 2010-06-04 16:33:23 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-06-11 17:15:19 -0700 |
| commit | 52801e076864241721455e14e860b8a0c51dee5c (patch) | |
| tree | 06448a8cd4fa71a60104cbaac64f992a68c3b895 /arch/arm/mach-tegra/include | |
| parent | e8df23df7b474cd4612e0f2d084c55b911b2173f (diff) | |
[ARM/tegra] suspend: add scratch register mapping for tegra 2 LP0
to restore from LP0, a large number of memory, arbitration and PLL
settings need to be preserved in scratch registers in the AO domain
for the boot ROM to reload them after exiting LP0.
Change-Id: Ic446ef47c3cba9b792dd7b86b176157757504bde
Reviewed-on: http://git-master/r/2154
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/include')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/iomap.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index c540a10f7b67..bd28f03dd4fc 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -83,6 +83,9 @@ #define TEGRA_APB_DMA_CH0_BASE 0x6000B000 #define TEGRA_APB_DMA_CH0_SIZE 32 +#define TEGRA_AHB_GIZMO_BASE 0x6000C004 +#define TEGRA_AHB_GIZMO_SIZE 0x10C + #define TEGRA_STATMON_BASE 0x6000C4000 #define TEGRA_STATMON_SIZE SZ_1K |