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authorAlex Frid <afrid@nvidia.com>2010-09-16 22:09:07 -0700
committerYu-Huan Hsu <yhsu@nvidia.com>2010-09-22 10:56:55 -0700
commit2279f9635a4914534e220285f377a292a9ad9d83 (patch)
tree44670093cadb8293583c62530d7ce0764cfc5fa2 /arch/arm/mach-tegra/nvrm
parentae81447a26b98ef94f03db094ad8c77f719b35a9 (diff)
[ARM/tegra] RM: Updated HDMI PLLC settings.
Changed PLLC settings to increase comparison and VCO frequency for 12MHz and 26MHz reference clocks. Kept PLLC settings unchanged for other reference clocks. Setup constant charge pump control for all HDMI PLL configurations. Bug 734868 Bug 719667 Change-Id: I6a34bbebc39042dbf9645cb84538eacf775eb8ff Reviewed-on: http://git-master.nvidia.com/r/6752 Reviewed-by: Hoang Pham <hopham@nvidia.com> Tested-by: Hoang Pham <hopham@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/nvrm')
-rw-r--r--arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c3
-rw-r--r--arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h4
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c
index 27ce11605808..b52e882b3650 100644
--- a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c
+++ b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c
@@ -707,6 +707,7 @@ static const NvRmPllFixedConfig s_Ap15HdmiPllC_Configurations[] =
NVRM_PLLHC_AT_26MHZ
};
+#define NVRM_HDMI_CPCON (8)
void
NvRmPrivAp15PllConfigureHdmi(
@@ -734,7 +735,7 @@ NvRmPrivAp15PllConfigureHdmi(
return;
}
NvRmPrivAp15PllSet(hRmDevice, pCinfo, HdmiConfig.M, HdmiConfig.N,
- HdmiConfig.P, (NvU32)-1, 0, 0, NV_TRUE, 0);
+ HdmiConfig.P, (NvU32)-1, NVRM_HDMI_CPCON, 0, NV_FALSE, 0);
*pPllOutKHz = NvRmPrivGetClockSourceFreq(pCinfo->SourceId);
}
diff --git a/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h b/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h
index 2658b15b12cf..b3db73d03e5a 100644
--- a/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h
+++ b/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h
@@ -203,10 +203,10 @@ typedef struct NvRmPllFixedConfigRec
#define NVRM_PLLHD_AT_19MHZ { 594000, 16, 495, 0, 0}
#define NVRM_PLLHD_AT_26MHZ { 594000, 13, 297, 0, 0}
-#define NVRM_PLLHC_AT_12MHZ { 594000, 12, 594, 0, 0}
+#define NVRM_PLLHC_AT_12MHZ { 594000, 04, 396, 1, 0}
#define NVRM_PLLHC_AT_13MHZ { 594000, 13, 594, 0, 0}
#define NVRM_PLLHC_AT_19MHZ { 594000, 16, 495, 0, 0}
-#define NVRM_PLLHC_AT_26MHZ { 594000, 26, 594, 0, 0}
+#define NVRM_PLLHC_AT_26MHZ { 594000, 13, 594, 1, 0}
// Display divider is part of the display module and it is not described
// in central module clock information table. Hence, need this define.