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authorPavan Kunapuli <pkunapuli@nvidia.com>2011-01-28 19:17:33 -0800
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:42:17 -0800
commitd75820e970dc1bf4787aee6ed174a2dd977f5713 (patch)
tree8fae13ca29a390a71cba88b5bf7b194f531f51c0 /arch/arm/mach-tegra/pinmux-t3-tables.c
parent7c2a55320b13f22618319df460521742176c6746 (diff)
sdhci-tegra:Enabling LVL2_CLK_OVR for sdmmc1
Enabling LVL2 CLK OVR bit for sdmmc1. Disabling cd and wp gpios for sdmmc1. Enabling vddio_sdmmc1 using regulator and setting the voltage to 3.3V. Using clk_m for sdmmc1. Original-Change-Id: Id38e2357c5cafe103b7607ef5adb4e7e9bc228d4 Reviewed-on: http://git-master/r/17212 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: I89e4ab5b4cc501cf02eb800bc3acb49b0dba2519 Rebase-Id: Rac6dfd5664a284867f0404c0a5d65fc23411b98a
Diffstat (limited to 'arch/arm/mach-tegra/pinmux-t3-tables.c')
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