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authorLaxman Dewangan <ldewangan@nvidia.com>2011-01-29 05:21:53 +0530
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:42:17 -0800
commite22447a52e3f053a0f57ef955acf8bed9ba379f8 (patch)
tree3fe9fb5c1e43013605892193cfa66dd51e2bb419 /arch/arm/mach-tegra/pinmux-t3-tables.c
parentd75820e970dc1bf4787aee6ed174a2dd977f5713 (diff)
arm: tegra: pinmux: Supporting LOCK/OD/IORESET pin configuration.
Supporting the LOCK, OpenDrain (OD), IO_RESET configuration on pinmux register through pinmux apis. Original-Change-Id: I2459723c5fbcadd925331696c9469f64d2ba3b20 Reviewed-on: http://git-master/r/17532 Reviewed-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com> Tested-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Original-Change-Id: Ibd06c9a650ffbacf51530514e58bd52d1f60b4f2 Rebase-Id: R8e593a0b1e27db641d2e0c7b57a2946d97819f25
Diffstat (limited to 'arch/arm/mach-tegra/pinmux-t3-tables.c')
-rw-r--r--arch/arm/mach-tegra/pinmux-t3-tables.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/pinmux-t3-tables.c b/arch/arm/mach-tegra/pinmux-t3-tables.c
index 798986ba1837..f49af0443cf2 100644
--- a/arch/arm/mach-tegra/pinmux-t3-tables.c
+++ b/arch/arm/mach-tegra/pinmux-t3-tables.c
@@ -99,6 +99,9 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
.pupd_reg = reg, \
.pupd_bit = 2, \
.io_default = TEGRA_PIN_ ## iod, \
+ .od_bit = 6, \
+ .lock_bit = 7, \
+ .ioreset_bit = 8, \
}
/* !!!FIXME!!! FILL IN fSafe COLUMN IN TABLE ....... */