diff options
| author | Kenji Chen <kenjchen@nvidia.com> | 2011-03-09 10:44:16 +0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:41:58 -0800 |
| commit | 8fbd82edeaeb8373359f52073d827d88d25a8049 (patch) | |
| tree | 2b937638bf55ba95f6fdf7df9f8f660490eea160 /arch/arm/mach-tegra/pinmux.c | |
| parent | 4e43a8a1df0d2b73ee987c7dffe5b6744e1aca98 (diff) | |
[ARM] tegra: pinmux: Correct driving strength programming offset
Offset of driving strength for DRVUP is 20 instead of 12.
Original-Change-Id: If886a8604ea43f57a8ae11d3deabb022fb8d3efd
Reviewed-on: http://git-master/r/22133
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R6407f84d3c11052d863f612276ecd5ef9f41a06c
Diffstat (limited to 'arch/arm/mach-tegra/pinmux.c')
| -rw-r--r-- | arch/arm/mach-tegra/pinmux.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c index 35ff1c02aa65..286ff4307e1b 100644 --- a/arch/arm/mach-tegra/pinmux.c +++ b/arch/arm/mach-tegra/pinmux.c @@ -459,8 +459,8 @@ static int tegra_drive_pinmux_set_pull_up(enum tegra_drive_pingroup pg, spin_lock_irqsave(&mux_lock, flags); reg = pg_readl(drive_pingroups[pg].reg); - reg &= ~(0x1f << 12); - reg |= pull_up << 12; + reg &= ~(0x1f << 20); + reg |= pull_up << 20; pg_writel(reg, drive_pingroups[pg].reg); spin_unlock_irqrestore(&mux_lock, flags); |