diff options
| author | Alex Frid <afrid@nvidia.com> | 2014-03-22 16:44:59 -0700 |
|---|---|---|
| committer | Yu-Huan Hsu <yhsu@nvidia.com> | 2014-03-27 13:15:06 -0700 |
| commit | 28b107dcb3aa122de8e94e48af548140d519298f (patch) | |
| tree | 96686a1437eb5de7d390d770e4a1ca64fc0cf119 /arch/arm/mach-tegra/platsmp.c | |
| parent | fd1c239922416a80b519658c352624a3bb06d07c (diff) | |
ARM: tegra: power: Add read fences in power gating
To assure post of the previous writes through Tegra interconnect
added read fences in the following power gating code paths:
- Seconadry CPU boot ungating (path taken on Tegra11, Tegra14, Tegra12)
- GPU rail clamps gating/ungating (path taken on Tegra12, Tegra13)
- MC client ungating flush done (path taken on all platforms)
Bug 1484343
Change-Id: Ie09ef37135beae0ed0beb1cd4d7e96187ba9be26
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/385403
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/platsmp.c')
| -rw-r--r-- | arch/arm/mach-tegra/platsmp.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 50659cab17c4..f755f939ffbf 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -269,6 +269,7 @@ static int tegra11x_power_up_cpu(unsigned int cpu) reg = PMC_TOGGLE_START | TEGRA_CPU_POWERGATE_ID(cpu); pmc_writel(reg, PWRGATE_TOGGLE); + pmc_readl(PWRGATE_TOGGLE); } return 0; |