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authortkasivajhula <tkasivajhula@nvidia.com>2010-06-16 15:23:26 -0700
committerGary King <gking@nvidia.com>2010-06-16 20:21:11 -0700
commite47496ef32afa204cdb50b159f816f624554470e (patch)
tree21a4260684bf0c8728715a724514c4a299080eab /arch/arm/mach-tegra/platsmp.c
parent448326c5f143854eda9401a05006f7c9670a9e63 (diff)
[ARM/tegra]: Turn off MMU in LP2tegra-9.12.14
With the MMU on, the instruction prefetcher can potentially fetch instructions from memory as the CPU is losing power. This can cause SDRAM to hang. Change-Id: Iee4a40cc65f25a5969c443710c3a446befd07f41 Reviewed-on: http://git-master/r/2789 Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/platsmp.c')
-rw-r--r--arch/arm/mach-tegra/platsmp.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 3190a7112066..547b2a3bf557 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -43,6 +43,7 @@ extern void tegra_secondary_startup(void);
static DEFINE_SPINLOCK(boot_lock);
static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE);
extern void __cortex_a9_restore(void);
+extern void __shut_off_mmu(void);
#ifdef CONFIG_HOTPLUG_CPU
static DEFINE_PER_CPU(struct completion, cpu_killed);
@@ -172,6 +173,7 @@ static int create_suspend_pgtable(void)
(unsigned long)tegra_context_area,
(unsigned long)virt_to_phys(tegra_hotplug_startup),
(unsigned long)__cortex_a9_restore,
+ (unsigned long)virt_to_phys(__shut_off_mmu),
};
unsigned long addr_p[] = {
PHYS_OFFSET,
@@ -179,6 +181,7 @@ static int create_suspend_pgtable(void)
(unsigned long)virt_to_phys(tegra_context_area),
(unsigned long)virt_to_phys(tegra_hotplug_startup),
(unsigned long)virt_to_phys(__cortex_a9_restore),
+ (unsigned long)virt_to_phys(__shut_off_mmu),
};
unsigned int flags = PMD_TYPE_SECT | PMD_SECT_AP_WRITE |
PMD_SECT_WBWA | PMD_SECT_S;