diff options
| author | Alex Frid <afrid@nvidia.com> | 2013-09-10 22:12:27 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-16 17:42:19 -0700 |
| commit | bed1b75f89ccd4a52e71392a539f0a95469a5c34 (patch) | |
| tree | c8b7ff46a0329421dfc40bd163ca20dc02a1a1eb /arch/arm/mach-tegra/pm-t3.c | |
| parent | f7800fd3ef6d33e8eee9b38d189b67b2a2e66f6c (diff) | |
ARM: tegra: power: Disable CPU sensors for cluster switch
Disabled soctherm CPU sensors before switch to LP cluster, if CRAIL
is controlled by s/w. Re-enabled sensors respectively after switch
back to G cluster. This is done to avoid bogus temperature reading
during cluster switch when s/w is turning CPU rail on/off.
Bug 1351735
Change-Id: Ia4864cdbfa622ca42533fe717a358a89dd262bc0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/272916
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm-t3.c')
| -rw-r--r-- | arch/arm/mach-tegra/pm-t3.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/pm-t3.c b/arch/arm/mach-tegra/pm-t3.c index 4134f2f83c5f..a6918766f97c 100644 --- a/arch/arm/mach-tegra/pm-t3.c +++ b/arch/arm/mach-tegra/pm-t3.c @@ -47,6 +47,7 @@ #include "sleep.h" #include "tegra3_emc.h" #include "dvfs.h" +#include "tegra11_soctherm.h" #define CREATE_TRACE_POINTS #include <trace/events/nvpower.h> @@ -251,9 +252,14 @@ void tegra_cluster_switch_prolog(unsigned int flags) ((flags & TEGRA_POWER_CLUSTER_PART_NONCPU) == 0) && (current_cluster == TEGRA_POWER_CLUSTER_LP)) reg |= FLOW_CTRL_CSR_ENABLE_EXT_NCPU; - else if (flags & TEGRA_POWER_CLUSTER_PART_CRAIL) - reg |= tegra_crail_can_start_early() ? - FLOW_CTRL_CSR_ENABLE_EXT_NCPU : FLOW_CTRL_CSR_ENABLE_EXT_CRAIL; + else if (flags & TEGRA_POWER_CLUSTER_PART_CRAIL) { + if (tegra_crail_can_start_early()) { + reg |= FLOW_CTRL_CSR_ENABLE_EXT_NCPU; + tegra_soctherm_adjust_cpu_zone(false); + } else { + reg |= FLOW_CTRL_CSR_ENABLE_EXT_CRAIL; + } + } if (flags & TEGRA_POWER_CLUSTER_PART_NONCPU) reg |= FLOW_CTRL_CSR_ENABLE_EXT_NCPU; @@ -365,6 +371,8 @@ void tegra_cluster_switch_epilog(unsigned int flags) cluster_switch_epilog_actlr(); cluster_switch_epilog_gic(); #if defined(CONFIG_ARCH_TEGRA_HAS_SYMMETRIC_CPU_PWR_GATE) + if (tegra_crail_can_start_early()) + tegra_soctherm_adjust_cpu_zone(true); } else if ((flags & TEGRA_POWER_CLUSTER_PART_CRAIL) && tegra_crail_can_start_early()) { tegra_powergate_partition(TEGRA_POWERGATE_CRAIL); |