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authorChris Johnson <cwj@nvidia.com>2012-08-24 17:27:58 -0700
committerMrutyunjay Sawant <msawant@nvidia.com>2012-09-06 04:12:10 -0700
commit3bdf9371b4e75e3dc9612360ab55924587714155 (patch)
treee7ade21f067a47681c4384e13a90475ee194cda0 /arch/arm/mach-tegra/pm.c
parent32b8cc820fc9f3709c23e6b383825d6cdb0a6085 (diff)
arm: tegra: secureos: disable L2 as part of sleep CPU SMC
This is an alternate way to have the L2 disabled available with later TL secureos versions. In this version, the sleep CPU SMC which is the last one issued before entering LP2 on CPU0, will also disable the L2 without a flush of the secureos workspace. Change-Id: I61c3caade6cb6f922b9d9f9ca0739bc6ae4e78cd Signed-off-by: Hyung Taek Ryoo <hryoo@nvidia.com> Reviewed-on: http://git-master/r/128951 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: James Zhao <jamesz@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm.c')
-rw-r--r--arch/arm/mach-tegra/pm.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 2cdfdfe6f43d..b20b51245d50 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -579,6 +579,16 @@ static void tegra_sleep_core(enum tegra_suspend_mode mode,
static inline void tegra_sleep_cpu(unsigned long v2p)
{
#ifdef CONFIG_TRUSTED_FOUNDATIONS
+ if (tegra_is_cpu_in_lp2(0)) {
+ struct thread_info *thread;
+
+ /* flush thread state (sleep SMC will also disable L2) */
+ thread = current_thread_info();
+ BUG_ON(!thread);
+
+ __cpuc_flush_dcache_area(thread, THREAD_SIZE);
+ outer_flush_range(__pa(thread), __pa(thread) + THREAD_SIZE);
+ }
tegra_generic_smc_uncached(0xFFFFFFFC, 0xFFFFFFE4,
(TEGRA_RESET_HANDLER_BASE +
tegra_cpu_reset_handler_offset));