diff options
| author | Sang-Hun Lee <sanlee@nvidia.com> | 2012-04-16 10:53:05 -0700 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-04-19 07:39:47 -0700 |
| commit | 73005f0d83526d615387a8f19669013feace1443 (patch) | |
| tree | ad5bc8c871346f902ce9db212d00e9dfa7156f2e /arch/arm/mach-tegra/pm.c | |
| parent | 357b6cf49ab72b94b1c77e03d7a5fa777f946973 (diff) | |
Revert "ARM: tegra: rethink the cpu suspend-resume code path"
This reverts commit f31ca2d9e0580b58dc51fde31fc8ace190dd253b.
Bug 967887
Change-Id: I3fe975f7a6939cace5e208947bcb82e09008c0ac
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/96787
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm.c')
| -rw-r--r-- | arch/arm/mach-tegra/pm.c | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index e53effb9b669..20e106499343 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -54,7 +54,6 @@ #include <asm/pgalloc.h> #include <asm/pgtable.h> #include <asm/tlbflush.h> -#include <asm/suspend.h> #include <mach/clk.h> #include <mach/iomap.h> @@ -264,6 +263,18 @@ static __init int create_suspend_pgtable(void) return 0; } +/* + * alloc_suspend_context + * + * Allocate a non-cacheable page to hold the CPU contexts. + * The standard ARM CPU context save functions don't work if there's + * an external L2 cache controller (like a PL310) in system. + */ +static __init int alloc_suspend_context(void) +{ + return 0; +} + /* ensures that sufficient time is passed for a register write to * serialize into the 32KHz domain */ static void pmc_32kwritel(u32 val, unsigned long offs) @@ -496,9 +507,9 @@ static void tegra_sleep_core(enum tegra_suspend_mode mode, } #endif #ifdef CONFIG_ARCH_TEGRA_2x_SOC - cpu_suspend(v2p, tegra2_sleep_core_finish); + tegra2_sleep_core(v2p); #else - cpu_suspend(v2p, tegra3_sleep_core_finish); + tegra3_sleep_core(v2p); #endif } @@ -509,7 +520,7 @@ static inline void tegra_sleep_cpu(unsigned long v2p) (TEGRA_RESET_HANDLER_BASE + tegra_cpu_reset_handler_offset)); #endif - cpu_suspend(v2p, tegra_sleep_cpu_finish); + tegra_sleep_cpu_save(v2p); } unsigned int tegra_idle_lp2_last(unsigned int sleep_time, unsigned int flags) @@ -1036,6 +1047,13 @@ void __init tegra_init_suspend(struct tegra_suspend_platform_data *plat) goto fail; } + if (alloc_suspend_context() < 0) { + pr_err("%s: CPU context alloc failed -- LP0/LP1/LP2 unavailable\n", + __func__); + plat->suspend_mode = TEGRA_SUSPEND_NONE; + goto fail; + } + if ((tegra_get_chipid() == TEGRA_CHIPID_TEGRA3) && (tegra_get_revision() == TEGRA_REVISION_A01) && (plat->suspend_mode == TEGRA_SUSPEND_LP0)) { |