diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-05 18:05:26 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:54 -0800 |
| commit | 27a435eb62ef122692e904cbd2959ac191bc43cc (patch) | |
| tree | c9bb6481c999823028e5fde632c184aeefb96f15 /arch/arm/mach-tegra/sleep-t2.S | |
| parent | 935cf35887d167f8cac58b72d8998a5d6712b27e (diff) | |
ARM: tegra: Redesign Tegra CPU reset handling
- Add a single unified handler for all CPU resets that is copied to
IRAM.
- Add state information to direct the flow of execution through the
reset handler based on the reason a CPU was reset.
- Write the EVP CPU reset vector only once per cold/warm boot session.
- Prevent modification of the EVP CPU reset vector in Tegra3.
Bug 786290
Bug 790458
Change-Id: Ica6707f3514986ee914e73a2d9766a4e06ce2d29
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
DW: Split into logical changes
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R7b9859a83717e76c3c083bdde724bd5fef9ce089
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t2.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep-t2.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/sleep-t2.S b/arch/arm/mach-tegra/sleep-t2.S index 271b188448a6..aacf630db2b2 100644 --- a/arch/arm/mach-tegra/sleep-t2.S +++ b/arch/arm/mach-tegra/sleep-t2.S @@ -211,7 +211,7 @@ ENTRY(tegra2_sleep_wfi) /* * cpu may be reset while in wfi, which will return through - * tegra_secondary_resume to cpu_resume to tegra_cpu_resume + * tegra_resume to cpu_resume to tegra_cpu_resume * or interrupt may wake wfi, which will return here * cpu state is unchanged - MMU is on, cache is on, coherency is off * |