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| author | Scott Williams <scwilliams@nvidia.com> | 2011-08-25 18:39:56 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:48:39 -0800 |
| commit | d83580a1cca20d10606889dab1cdf1debf21a84e (patch) | |
| tree | 3172f0cb227b70c3552d21a6a2a871a85aada1e9 /arch/arm/mach-tegra/sleep.S | |
| parent | 1e048367f228e4104b0935d3faa51b7f43f28b8a (diff) | |
ARM: tegra: power: Fix build error on non-SMP systems
Can't use NR_CPUS on non-SMP systems. Just use the maximum.
Change-Id: Ie0d6289c3b8bdaada6335e4670c9f6b5ab2bcc93
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/49344
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R58abf556bf542b8cf0ee6dd0f091806235f49623
Diffstat (limited to 'arch/arm/mach-tegra/sleep.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S index d254962d9227..c2b0300629b4 100644 --- a/arch/arm/mach-tegra/sleep.S +++ b/arch/arm/mach-tegra/sleep.S @@ -186,7 +186,7 @@ ENDPROC(tegra_cpu_resume_phys) .align L1_CACHE_SHIFT .globl tegra_phys_sleep_sp tegra_phys_sleep_sp: - .rept CONFIG_NR_CPUS + .rept 4 .long 0 @ preserve stack phys ptr here .endr .align L1_CACHE_SHIFT @ nothing else must be in this cache line |