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authorJoseph Lo <josephl@nvidia.com>2013-01-03 14:42:59 +0800
committerStephen Warren <swarren@nvidia.com>2013-01-28 10:21:44 -0700
commit57886616ca7bff844a6427436d0c8faf74653f73 (patch)
tree4c353be72a7f266727320189e8e91965b93fa0b0 /arch/arm/mach-tegra/sleep.h
parent130bfed72c75a36c76ecc82d73818c6fccd2a468 (diff)
ARM: tegra: update the cache maintenance order for CPU shutdown
Updating the cache maintenance order before CPU shutdown when doing CPU hotplug. The old order: * clean L1 by flush_cache_all * exit SMP * CPU shutdown Adapt to: * disable L1 data cache by clear C bit * clean L1 by v7_flush_dcache_louis * exit SMP * CPU shutdown For CPU hotplug case, it's no need to do "flush_cache_all". And we should disable L1 data cache before clean L1 data cache. Then leaving the SMP coherency. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep.h')
-rw-r--r--arch/arm/mach-tegra/sleep.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h
index 9821ee725420..56505c381ea8 100644
--- a/arch/arm/mach-tegra/sleep.h
+++ b/arch/arm/mach-tegra/sleep.h
@@ -106,6 +106,7 @@ exit_l2_resume:
#else
void tegra_resume(void);
int tegra_sleep_cpu_finish(unsigned long);
+void tegra_disable_clean_inv_dcache(void);
#ifdef CONFIG_HOTPLUG_CPU
void tegra20_hotplug_init(void);