ARM: tegra: clock: Re-factor Tegra3 cpu clocks

Added second level virtualization (on top of virtual cpu rate control)
to support different Tegra3 CPU power modes: low power (LP) mode and
geared performance (G) mode. Virtual cpu complex (cpu_cmplx) clock is
defined as a child with two parents: virtual cpu_lp and virtual cpu_g
clocks for the respective modes. Mode switch sequence was integrated
into cpu_cmplx set parent implementation. (Before this commit mode
switch was triggered outside the clock framework, which created cpu
clock/mode synchronization problems).

Each mode clock is derived from its own super clock mux (cclk_lp and
cclk_g) to statically match Tegra3 h/w layout. (Before this commit the
code had to dynamically synchronize CPU mode and active mux selection).
This change also allowed to support PLLX output divider for low power
mode as fixed 1:2 divider with bypass control embedded into cclk_lp
parent section.

Updated auto and sysfs CPU mode switch calls to use new clock framework,
and removed clock manipulation from the low level mode switch
implementation.

Original-Change-Id: Ibc3cc495b2ff29e2d3417eff2bfd45535cbd015b
Reviewed-on: http://git-master/r/24734
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I23ae80edbf14fb22727a6fc317cd9e5baf8bd6be

Rebase-Id: Rdcd4a2165ebd92bf4caa35d68ca81d19a3789351

1 files changed, 22 insertions, 6 deletions

diff --git a/arch/arm/mach-tegra/sysfs-cluster.c b/arch/arm/mach-tegra/sysfs-cluster.c
index eaded6c2fc70..e6c06fcabce5 100644
--- a/arch/arm/mach-tegra/sysfs-cluster.c
+++ b/arch/arm/mach-tegra/sysfs-cluster.c
@@ -84,9 +84,11 @@
 #include <linux/kobject.h>
 #include <linux/smp.h>
 #include <linux/io.h>
+#include <linux/clk.h>
 
 #include <mach/iomap.h>
 #include "power.h"
+#include "clock.h"
 
 #define SYSFS_CLUSTER_PRINTS	   1	/* Nonzero: enable status prints */
 #define SYSFS_CLUSTER_TRACE_PRINTS 0	/* Nonzero: enable trace prints */
@@ -239,6 +241,15 @@ static ssize_t sysfscluster_store(struct kobject *kobj,
 	int e;
 	int tmp;
 	int cnt;
+	struct clk *cpu_clk = tegra_get_clock_by_name("cpu");
+	struct clk *cpu_g_clk = tegra_get_clock_by_name("cpu_g");
+	struct clk *cpu_lp_clk = tegra_get_clock_by_name("cpu_lp");
+	struct clk *new_parent = NULL;
+
+	if (!cpu_clk || !cpu_g_clk || !cpu_lp_clk) {
+		ret = -ENOSYS;
+		goto fail;
+	}
 
 	TRACE_CLUSTER(("+sysfscluster_store: %p, %d\n", buf, count));
 
@@ -282,12 +293,9 @@ static ssize_t sysfscluster_store(struct kobject *kobj,
 			request |= TEGRA_POWER_SDRAM_SELFREFRESH;
 		}
 #endif
-		e = tegra_cluster_control(wake_ms * 1000, request);
-		if (e) {
-			PRINT_CLUSTER(("cluster/active: request failed (%d)\n",
-				       e));
-			ret = e;
-		}
+		tegra_cluster_switch_set_parameters(wake_ms * 1000, request);
+		new_parent = (flags & TEGRA_POWER_CLUSTER_LP) ?
+			cpu_lp_clk : cpu_g_clk;
 		break;
 
 	case ClusterAttr_Immediate:
@@ -372,6 +380,14 @@ static ssize_t sysfscluster_store(struct kobject *kobj,
 
 	spin_unlock(&cluster_lock);
 
+	if (new_parent) {
+		e = clk_set_parent(cpu_clk, new_parent);
+		if (e) {
+			PRINT_CLUSTER(("cluster/active: request failed (%d)\n",
+				       e));
+			ret = e;
+		}
+	}
 fail:
 	TRACE_CLUSTER(("-sysfscluster_store: %d\n", count));
 	return ret;