diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-08-06 20:30:28 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:31:28 -0700 |
| commit | bd963f68addf2765fe863ac28eddf8df2aaf21e6 (patch) | |
| tree | 2d37749db82c519702d40c502a5b60366ecd16ae /arch/arm/mach-tegra/tegra11_clocks.c | |
| parent | 9d0f4112cce9af76688ec5b9cc0b0291c9e979de (diff) | |
ARM: tegra11: clock: Account for effective EMC bus width
Since EMC shared bandwidth users normalize EMC rate request to 32-bit
bus, added scaling to actual 64-bit effective bus width on Tegra11.
Change-Id: Ibec57e990393f67ab5c57da5283904959eaf054e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/121542
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R03599013e1ee8061dd6b104279bc1f95215b3a7f
Diffstat (limited to 'arch/arm/mach-tegra/tegra11_clocks.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra11_clocks.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra11_clocks.c b/arch/arm/mach-tegra/tegra11_clocks.c index 975b416cc94a..2dc1a07b6b96 100644 --- a/arch/arm/mach-tegra/tegra11_clocks.c +++ b/arch/arm/mach-tegra/tegra11_clocks.c @@ -33,6 +33,7 @@ #include <mach/iomap.h> #include <mach/edp.h> #include <mach/hardware.h> +#include <mach/mc.h> #include "clock.h" #include "fuse.h" @@ -4431,6 +4432,14 @@ static int tegra_clk_shared_bus_migrate_users(struct clk *user) static void tegra_clk_shared_bus_init(struct clk *c) { c->max_rate = c->parent->max_rate; + + /* EMC BW requets are normilized by the clients to 32 bit bus, + hence, max limits should be scaled up to actual bus width */ + if ((c->parent->flags & PERIPH_EMC_ENB) && + (c->u.shared_bus_user.mode == SHARED_BW)) { + c->max_rate *= tegra_mc_get_effective_bytes_width() / 4; + } + c->u.shared_bus_user.rate = c->parent->max_rate; c->state = OFF; c->set = true; @@ -4523,6 +4532,10 @@ static long tegra_clk_shared_bus_round_rate(struct clk *c, unsigned long rate) if (c->div > 1) rate /= c->div; + } else if (c->parent->flags & PERIPH_EMC_ENB) { + /* EMC BW requets are normilized by the clients to 32 bit bus, + and should be scaled down to actual bus width */ + rate /= tegra_mc_get_effective_bytes_width() / 4; } return rate; } |