diff options
author | Alex Frid <afrid@nvidia.com> | 2013-06-06 19:26:17 -0700 |
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committer | Riham Haidar <rhaidar@nvidia.com> | 2013-06-17 20:21:52 -0700 |
commit | 04e884cd66dbba374b9fceccfaab513239b42dbe (patch) | |
tree | aa87734746b384bc40b2bf3e1cf79ba36cd0cd17 /arch/arm/mach-tegra/tegra11_edp.c | |
parent | fdaf92c9e94d9508d3775a58a5e156f8a9366a22 (diff) |
ARM: tegra11: power: Add AP40 core edp tables
Bug 1200217
Change-Id: Ib68414030e932d75ba4275aec19ceff34e90329d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/236556
Reviewed-by: Bo Yan <byan@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra11_edp.c')
-rw-r--r-- | arch/arm/mach-tegra/tegra11_edp.c | 175 |
1 files changed, 175 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra11_edp.c b/arch/arm/mach-tegra/tegra11_edp.c index cc1405517dac..6a9c422e61c7 100644 --- a/arch/arm/mach-tegra/tegra11_edp.c +++ b/arch/arm/mach-tegra/tegra11_edp.c @@ -346,6 +346,181 @@ static struct core_edp_entry core_edp_table[] = { }, }, }, + /* SKU 6 */ + { + .sku = 0x6, /* SKU = 6 */ + .process_id = 0, /* bin 0 */ + .cap_mA = 4000, /* 4A cap */ + .mult = 1000000, /* MHZ */ + .cap_scpu_on = { + /* favor emc */ + { /* core modules power state 0 (all ON) */ + {{ 792, 348 }, + { 792, 348 }, + { 792, 312 }, + { 792, 264 }, + }, + }, + /* balanced profile */ + { /* core modules power state 0 (all ON) */ + {{ 660, 372 }, + { 660, 372 }, + { 660, 336 }, + { 660, 300 }, + }, + }, + /* favor gpu */ + { /* core modules power state 0 (all ON) */ + {{ 408, 492 }, + { 408, 396 }, + { 408, 396 }, + { 408, 396 }, + } + }, + }, + .cap_scpu_off = { + /* favor emc */ + { /* core modules power state 0 (all ON) */ + {{ 792, 444 }, + { 792, 444 }, + { 792, 408 }, + { 792, 372 }, + }, + }, + /* balanced profile */ + { /* core modules power state 0 (all ON) */ + {{ 660, 492 }, + { 660, 492 }, + { 660, 456 }, + { 660, 408 }, + }, + }, + /* favor gpu */ + { /* core modules power state 0 (all ON) */ + {{ 408, 552 }, + { 408, 516 }, + { 408, 516 }, + { 408, 516 }, + } + }, + }, + }, + { + .sku = 0x6, /* SKU = 6 */ + .process_id = 1, /* bin 1 */ + .cap_mA = 4000, /* 4A cap */ + .mult = 1000000, /* MHZ */ + .cap_scpu_on = { + /* favor emc */ + { /* core modules power state 0 (all ON) */ + {{ 792, 348 }, + { 792, 348 }, + { 792, 312 }, + { 792, 264 }, + }, + }, + /* balanced profile */ + { /* core modules power state 0 (all ON) */ + {{ 660, 420 }, + { 660, 372 }, + { 660, 336 }, + { 660, 300 }, + }, + }, + /* favor gpu */ + { /* core modules power state 0 (all ON) */ + {{ 408, 528 }, + { 408, 492 }, + { 408, 420 }, + { 408, 420 }, + } + }, + }, + .cap_scpu_off = { + /* favor emc */ + { /* core modules power state 0 (all ON) */ + {{ 792, 444 }, + { 792, 444 }, + { 792, 408 }, + { 792, 372 }, + }, + }, + /* balanced profile */ + { /* core modules power state 0 (all ON) */ + {{ 660, 492 }, + { 660, 492 }, + { 660, 456 }, + { 660, 408 }, + }, + }, + /* favor gpu */ + { /* core modules power state 0 (all ON) */ + {{ 408, 564 }, + { 408, 564 }, + { 408, 564 }, + { 408, 528 }, + } + }, + }, + }, + { + .sku = 0x6, /* SKU = 6 */ + .process_id = -1, /* any process id */ + .cap_mA = 6000, /* 6A cap */ + .mult = 1000000, /* MHZ */ + .cap_scpu_on = { + /* favor emc */ + { /* core modules power state 0 (all ON) */ + {{ 792, 600 }, + { 792, 600 }, + { 792, 600 }, + { 792, 516 }, + }, + }, + /* balanced profile */ + { /* core modules power state 0 (all ON) */ + {{ 792, 600 }, + { 792, 600 }, + { 792, 600 }, + { 660, 600 }, + }, + }, + /* favor gpu */ + { /* core modules power state 0 (all ON) */ + {{ 792, 600 }, + { 792, 600 }, + { 792, 600 }, + { 660, 600 }, + } + }, + }, + .cap_scpu_off = { + /* favor emc */ + { /* core modules power state 0 (all ON) */ + {{ 792, 600 }, + { 792, 600 }, + { 792, 600 }, + { 792, 600 }, + }, + }, + /* balanced profile */ + { /* core modules power state 0 (all ON) */ + {{ 792, 600 }, + { 792, 600 }, + { 792, 600 }, + { 792, 600 }, + }, + }, + /* favor gpu */ + { /* core modules power state 0 (all ON) */ + {{ 792, 600 }, + { 792, 600 }, + { 792, 600 }, + { 792, 600 }, + } + }, + }, + }, }; static struct core_edp_entry *find_edp_entry(int sku, unsigned int regulator_mA) |