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authorAlex Frid <afrid@nvidia.com>2013-12-06 20:37:18 -0800
committerYu-Huan Hsu <yhsu@nvidia.com>2013-12-12 13:08:25 -0800
commit08d00b2e82755cbde0406b2fc0b712f3978da9ee (patch)
tree8ad4da07d94870f05a9d085364d998199c071588 /arch/arm/mach-tegra/tegra12_dvfs.c
parentf54adfcd6d821afe8dcddd1dc02877d3bf2730cf (diff)
ARM: tegra12: dvfs: Initialize GPU DVFS with SiMon offsets
Added GPU SiMon offset array with just 2 entries, since only one GPU SiMon high grade (besides default) is characterized on Tegra12. Constructed GPU DVFS table shifted by high grade offset during GPU initialization. The new table is not used, for now. Decreased GPU rail minimum voltage limit to include offset. Bug 1343366 Change-Id: I582fbce28be5d4b721d90fb3bbf1fa1e0c5e3453 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/339675 GVS: Gerrit_Virtual_Submit Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra12_dvfs.c')
-rw-r--r--arch/arm/mach-tegra/tegra12_dvfs.c31
1 files changed, 27 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/tegra12_dvfs.c b/arch/arm/mach-tegra/tegra12_dvfs.c
index 661cae7d89d6..443a5f3e4705 100644
--- a/arch/arm/mach-tegra/tegra12_dvfs.c
+++ b/arch/arm/mach-tegra/tegra12_dvfs.c
@@ -41,6 +41,8 @@ static bool tegra_dvfs_gpu_disabled;
#define VDD_SAFE_STEP 100
+static int gpu_vmin_offsets[] = { 0, -30, };
+
static int vdd_core_vmin_trips_table[MAX_THERMAL_LIMITS] = { 20, };
static int vdd_core_therm_floors_table[MAX_THERMAL_LIMITS] = { 900, };
@@ -108,7 +110,7 @@ static struct dvfs_rail tegra12_dvfs_rail_vdd_core = {
static struct dvfs_rail tegra12_dvfs_rail_vdd_gpu = {
.reg_id = "vdd_gpu",
.max_millivolts = 1350,
- .min_millivolts = 680,
+ .min_millivolts = 650,
.step = VDD_SAFE_STEP,
.step_up = 1350,
.in_band_pm = true,
@@ -470,6 +472,7 @@ static struct gpu_cvb_dvfs gpu_cvb_dvfs_table[] = {
static int gpu_vmin[MAX_THERMAL_RANGES];
static int gpu_peak_millivolts[MAX_DVFS_FREQS];
static int gpu_millivolts[MAX_THERMAL_RANGES][MAX_DVFS_FREQS];
+static int gpu_millivolts_offs[MAX_THERMAL_RANGES][MAX_DVFS_FREQS];
static struct dvfs gpu_dvfs = {
.clk_name = "gbus",
.auto_dvfs = true,
@@ -816,7 +819,7 @@ static int __init set_cpu_dvfs_data(unsigned long max_freq,
static int __init set_gpu_dvfs_data(unsigned long max_freq,
struct gpu_cvb_dvfs *d, struct dvfs *gpu_dvfs, int *max_freq_index)
{
- int i, j, thermal_ranges, mv;
+ int i, j, thermal_ranges, simon_offs, mv;
struct cvb_dvfs_table *table = NULL;
int speedo = tegra_gpu_speedo_value();
struct dvfs_rail *rail = &tegra12_dvfs_rail_vdd_gpu;
@@ -824,6 +827,11 @@ static int __init set_gpu_dvfs_data(unsigned long max_freq,
d->max_mv = round_voltage(d->max_mv, align, false);
+ /* Init gpu Vmin SiMon offsets (Tegra12 has exactly 2 offsests) */
+ BUILD_BUG_ON(ARRAY_SIZE(gpu_vmin_offsets) != 2);
+ tegra_dvfs_rail_init_simon_vmin_offsets(gpu_vmin_offsets, 2, rail);
+ simon_offs = rail->simon_vmin_offsets ? rail->simon_vmin_offsets[1] : 0;
+
/*
* Init thermal trips, find number of thermal ranges; note that the
* first trip-point is used for voltage calculations within the lowest
@@ -853,10 +861,20 @@ static int __init set_gpu_dvfs_data(unsigned long max_freq,
t, d->thermal_scale, &d->cvb_vmin.cvb_pll_param);
mvj = round_cvb_voltage(mvj, d->voltage_scale, align);
if (mvj < rail->min_millivolts) {
- WARN(1, "tegra12_dvfs: gpu Vmin %d below rail min %d\n",
+ WARN(1, "tegra12_dvfs: gpu min %dmV below rail min %dmV\n",
mvj, rail->min_millivolts);
mvj = rail->min_millivolts;
}
+
+ /* check Vmin SiMon offset: ignore SiMon if it pushes too low */
+ if (mvj + simon_offs < rail->min_millivolts) {
+ WARN(1, "tegra12_dvfs: gpu simon min %dmV below rail min %dmV\n",
+ mvj + simon_offs, rail->min_millivolts);
+ rail->simon_vmin_offsets = NULL;
+ rail->simon_vmin_offs_num = 0;
+ simon_offs = 0;
+ }
+
gpu_vmin[j] = mvj;
}
@@ -874,7 +892,7 @@ static int __init set_gpu_dvfs_data(unsigned long max_freq,
speedo, d->speedo_scale, &table->cvb_pll_param);
for (j = 0; j < thermal_ranges; j++) {
- int mvj = mv;
+ int mvj_offs, mvj = mv;
int t = rail->vts_cdev->trip_temperatures[j];
/* get thermal offset for this trip-point */
@@ -883,6 +901,7 @@ static int __init set_gpu_dvfs_data(unsigned long max_freq,
mvj = round_cvb_voltage(mvj, d->voltage_scale, align);
/* clip to minimum, abort if above maximum */
+ mvj_offs = max(mvj, gpu_vmin[j] + simon_offs);
mvj = max(mvj, gpu_vmin[j]);
if (mvj > d->max_mv)
break;
@@ -892,6 +911,10 @@ static int __init set_gpu_dvfs_data(unsigned long max_freq,
gpu_millivolts[j][i] = mvj;
if (j && (gpu_millivolts[j-1][i] < mvj))
gpu_millivolts[j-1][i] = mvj;
+
+ gpu_millivolts_offs[j][i] = mvj_offs;
+ if (j && (gpu_millivolts_offs[j-1][i] < mvj_offs))
+ gpu_millivolts_offs[j-1][i] = mvj_offs;
}
/* Make sure all voltages for this frequency are below max */
if (j < thermal_ranges)