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authorAlex Frid <afrid@nvidia.com>2013-11-07 21:31:16 -0800
committerDiwakar Tundlam <dtundlam@nvidia.com>2013-11-27 16:16:11 -0800
commit12859669baa581e5aa3e34f9bd8ef68804824f76 (patch)
tree1701ff3a867904d3d11c85597fc3b708247612e0 /arch/arm/mach-tegra/tegra12_dvfs.c
parent640af0f1f977eb74e37f5be3a612402d1294ba83 (diff)
ARM: tegra12: dvfs: Add core rail Vmax thermal profile
Bug 1413311 Change-Id: I0c945ec3b058a0fe10baee3c5c0535e8f8f32042 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/335402 GVS: Gerrit_Virtual_Submit Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra12_dvfs.c')
-rw-r--r--arch/arm/mach-tegra/tegra12_dvfs.c21
1 files changed, 18 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/tegra12_dvfs.c b/arch/arm/mach-tegra/tegra12_dvfs.c
index 475bc2df30e9..943b1f02aab1 100644
--- a/arch/arm/mach-tegra/tegra12_dvfs.c
+++ b/arch/arm/mach-tegra/tegra12_dvfs.c
@@ -39,12 +39,14 @@ static bool tegra_dvfs_gpu_disabled;
#define KHZ 1000
#define MHZ 1000000
-/* FIXME: need tegra12 step */
#define VDD_SAFE_STEP 100
-static int vdd_core_therm_trips_table[MAX_THERMAL_LIMITS] = { 20, };
+static int vdd_core_vmin_trips_table[MAX_THERMAL_LIMITS] = { 20, };
static int vdd_core_therm_floors_table[MAX_THERMAL_LIMITS] = { 900, };
+static int vdd_core_vmax_trips_table[MAX_THERMAL_LIMITS] = { 62, 72, 82, };
+static int vdd_core_therm_caps_table[MAX_THERMAL_LIMITS] = { 1130, 1100, 1060, };
+
#ifndef CONFIG_TEGRA_CPU_VOLT_CAP
static int vdd_cpu_vmax_trips_table[MAX_THERMAL_LIMITS] = { 62, 72, 82, };
static int vdd_cpu_therm_caps_table[MAX_THERMAL_LIMITS] = { 1230, 1210, 1180, };
@@ -58,6 +60,10 @@ static struct tegra_cooling_device cpu_vmin_cdev = {
.cdev_type = "cpu_cold",
};
+static struct tegra_cooling_device core_vmax_cdev = {
+ .cdev_type = "core_hot",
+};
+
static struct tegra_cooling_device core_vmin_cdev = {
.cdev_type = "core_cold",
};
@@ -95,6 +101,7 @@ static struct dvfs_rail tegra12_dvfs_rail_vdd_core = {
.step = VDD_SAFE_STEP,
.step_up = 1400,
.vmin_cdev = &core_vmin_cdev,
+ .vmax_cdev = &core_vmax_cdev,
};
/* TBD: fill in actual hw number */
@@ -1015,8 +1022,10 @@ void __init tegra12x_init_dvfs(void)
BUG_ON((i == ARRAY_SIZE(gpu_cvb_dvfs_table)) || ret);
/* Init core thermal profile */
- tegra_dvfs_rail_init_vmin_thermal_profile(vdd_core_therm_trips_table,
+ tegra_dvfs_rail_init_vmin_thermal_profile(vdd_core_vmin_trips_table,
vdd_core_therm_floors_table, &tegra12_dvfs_rail_vdd_core, NULL);
+ tegra_dvfs_rail_init_vmax_thermal_profile(vdd_core_vmax_trips_table,
+ vdd_core_therm_caps_table, &tegra12_dvfs_rail_vdd_core, NULL);
/* Init rail structures and dependencies */
tegra_dvfs_init_rails(tegra12_dvfs_rails,
@@ -1127,6 +1136,10 @@ static int __init tegra12_dvfs_init_core_cap(void)
kobject_del(cap_kobj);
return 0;
}
+
+ /* core cap must be initialized for vmax cdev operations */
+ tegra_dvfs_rail_register_vmax_cdev(&tegra12_dvfs_rail_vdd_core);
+
tegra_core_cap_debug_init();
pr_info("tegra dvfs: tegra sysfs cap interface is initialized\n");
@@ -1164,6 +1177,8 @@ static int __init tegra12_dvfs_init_core_cap(void)
}
pr_info("tegra dvfs: tegra sysfs gpu interface is initialized\n");
+
+
return 0;
}
late_initcall(tegra12_dvfs_init_core_cap);