diff options
| author | Alex Frid <afrid@nvidia.com> | 2014-02-15 20:51:23 -0800 |
|---|---|---|
| committer | Yu-Huan Hsu <yhsu@nvidia.com> | 2014-02-18 11:39:07 -0800 |
| commit | da36c6d19892397d66d140b2b57ab465a1ab417c (patch) | |
| tree | b1f3cb06ca6d125683107ca00ea2dcaa1c292716 /arch/arm/mach-tegra/tegra12_dvfs.c | |
| parent | 6b2ad2fd412b21c068ceb8712f398c5164ce5daa (diff) | |
ARM: tegra12: dvfs: Fix thermal limits comparison
When initializing CPU thermal limits profiles, original characterized
limits are compared with CPU DFLL minimum voltage already aligned to
PMIC ladder. This potentially may result in false negative outcome.
Fixed it by using non aligned minimum voltage as well.
Bug 1343366
Change-Id: I5fe5e10574a729c99e66fb5b792e758417d38db5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/368123
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra12_dvfs.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra12_dvfs.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/tegra12_dvfs.c b/arch/arm/mach-tegra/tegra12_dvfs.c index 38a214d9bb8f..404f4a47d6f4 100644 --- a/arch/arm/mach-tegra/tegra12_dvfs.c +++ b/arch/arm/mach-tegra/tegra12_dvfs.c @@ -860,17 +860,16 @@ static int __init set_cpu_dvfs_data(unsigned long max_freq, cpu_dvfs->dfll_data.is_bypass_down = is_lp_cluster; /* Init cpu thermal floors */ - if (d->therm_floors_table[0]) /* if table contains at least one entry */ tegra_dvfs_rail_init_vmin_thermal_profile( d->vmin_trips_table, d->therm_floors_table, - rail, &cpu_dvfs->dfll_data); + rail, &d->dfll_tune_data); /* Init cpu thermal caps */ #ifndef CONFIG_TEGRA_CPU_VOLT_CAP tegra_dvfs_rail_init_vmax_thermal_profile( vdd_cpu_vmax_trips_table, vdd_cpu_therm_caps_table, - rail, &cpu_dvfs->dfll_data); + rail, &d->dfll_tune_data); #endif /* Init cpu Vmin SiMon offsets */ |