summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/tegra2_save.S
diff options
context:
space:
mode:
authorLaxman Dewangan <ldewangan@nvidia.com>2010-06-14 18:46:38 +0530
committerGary King <gking@nvidia.com>2010-06-16 19:14:35 -0700
commit448326c5f143854eda9401a05006f7c9670a9e63 (patch)
treec7b029b1b21118ef5f5b108b900ebed1c1c5ecb4 /arch/arm/mach-tegra/tegra2_save.S
parentfc8aec77b4ac06e6ea9fc1c3675b2ecfe40366f5 (diff)
[arm/tegra] dma: Checking interrupt pending status.
It is observed that the dma interrupt has the lower priority then its client interupt priority. When client's isr calls dma get transfer, the dma status has not been upated as dma isr have not been served yet. So before reading the status, explicitly checking the interrupt status and handling accordingly. The another issue which is observed is that if dma has transferred the data of amount = requested -4 and if it moves to invalid requestor before stopping then status got reset and tarnsfered bytes becomes 0. This seems the apb dma hw behavior. Following is the suggestion to overcome this issue: - Disable global enable bit. - Read status. - Stop dma. - Enable global status bit. Added this workaround and it worked fine. Change-Id: I5d12d2b655cc21d47b906de70165e8034a9233df Reviewed-on: http://git-master/r/2580 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra2_save.S')
0 files changed, 0 insertions, 0 deletions